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NXP Semiconductors PN544 C2 - Page 5

NXP Semiconductors PN544 C2
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NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 5 of 172
Abbr. Abbreviation
RAM Random Access Module (volatile memory)
Reg Register
REJ Reject (HDLC)
RF Radio Frequency (here 13,56MHz)
RFU Reserved for future use
RI Control Line on RS232: Ring Indicator
RNR Receiver Not Ready (HDLC)
RO Read only
RR Receiver Ready (HDLC)
RSET Reset (ETSI)
RW Read / write
SHDLC Simplified HDLC
SPI Serial Peripheral Interface
SREJ Selective Reject (HDLC)
SWP Single Wire Protocol
UART Universal Asynchronous Receiver Transmitter
UI Unnumbered Information (HDLC)
UICC Universal Integrated Circuit Card

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