NXP Semiconductors PN544 C2 - Page 80

NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 80 of 172
Table 71. Polling Loop Registry
Id Name Access
Rights
Comment Length Default
‘06’ NXP_PL_RDPHASES RW
(Reg)
Indicates the status of the phases:
Bit Technology
0 Detection type A
1 Detection type B
2 Detection type F 212
3 Detection type F 424
4 Detection ISO15693
5 Detection NFC active
6 RFU
7 Detection Pause(*)
0 -> disabled
1 -> enabled
(*)When Pause phase is enabled, it implicitly
replaces the Emulation phase (setting:
NXP_PL_PAUSE)
1 0x00
‘07’ NXP_PL_EMULATION RW
(EE)
Indicates the Emulation phase duration.
(from 0 to 3.145s in 48µs step)
2 0x5161
(1s)
‘08’ NXP_PL_PAUSE RW
(EE)
Indicates the Pause phase duration.
(from 0 to 3.145s in 48µs step)
2 0x0824
(100ms)
‘09’ NXP_PL_NFCT_DEACTIVATED
RW
(Reg)
Disable all NFC Target feature (passive/
active/all baudrates)
0x00 : NFC Target Phase Activated
0x01 : NFC Target Phase deactivated
Other values unsupported
1 0x00