155
Exchanging Data with the CPU Unit Section 3-3
MV Reversing
Output can be reversed so that when the output value is 100.00%, 0.00% is
output, and when the output value is 0.00%, 100.00% is output.
Timing for
exchanging data with
the CPU Unit
The timing for exchanging data with the CPU Unit depends on the Loop Con-
troller model, as shown on the following table.
Note With the first three types of data listed above, all data is not refreshed in one
cycle (duplex refresh cycle) when Process-control CPU Units (CS1D-
CPU@@P) are used. The data is refreshed over several cycles, under the
specified cycle conditions outlined below.
1,2,3... 1. User Link Tables: Specified refresh cycle for each tag.
2. HMI data area (EM Area): Refresh cycle specified by ITEM051 (HMI func-
tion's operation cycle) of the System Common Block.
3. I/O memory allocated to Field Terminal blocks: Operation cycle specified
by ITEM004 of the Field Terminal block.
Note For CS1W-LCB01 and CS1W-LCB05 Loop Control Boards, User Link Table
and HMI data area refresh are executed independently of the CPU Units cycle
(i.e., asynchronously). In contrast, the Process-control CPU Unit (CS1D-
CPU@@P) refreshes data set to a certain refresh cycle within that refresh
cycle (synchronous with the CPU Unit) and always over several CPU Unit
Setting item Details
Expansion set-
ting
MV reversing When the output value is 100.00%, 0.00% is
output, and when the output value is 0.00%,
100.00% is output.
Data Type Timing for Exchanging Data with the CPU Unit's
I/O Memory
Loop Control Boards
(CS1W-LCB01/05) and
Loop-control CPU
Units (CJ1G-CPU@@P)
Process-control CPU
Unit (CS1D-CPU@@P)
User Link Table refresh Executed for each
refresh cycle
(Asynchronous with the
CPU Unit's cycle time.)
Refreshes data over
multiple CPU Unit cycle
times (At the duplex
refresh timing.) (See
note.)
HMI data area (EM Area)
refresh (HMI function)
Refresh with I/O memory allo-
cated to Field Terminal blocks
Refresh A355 and other Auxil-
iary Area data related to Loop
Controllers
Executed every second.
(Not synchronous with
the CPU Unit's cycle
time.)
Refresh Timing for User Link Tables, HMI Data,
and I/O Memory Allocated to Field Terminal Blocks
CPU Unit
cycle time
CPU Unit
cycle time
Data exchanged over several cycles.
Specified refresh cycle
(All specified refresh cycle data
is exchanged in this cycle)
: Data exchange with CPU Unit
(for duplex refresh)
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