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1.1.9. Modem and Peripheral Circuit
This circuit consists of DSP, ROM, S-RAM, Analog Front End, Analog Master and peripheral circuitry. This
modem conforms to ITU-T, V.34, V.33, V.17, V.29, V.27ter, V.21 channel 2 (FSK), T.4, and T.30. Macro order
of DSP is sent from ROM to S-RAM and is outputted. DSP transfers/receives data from Analog Front End
and serial communication. Analog Front End communicates with the line through Analog Master.
1.1.10. Receive Signal Control Circuit
This circuit consists of Operational Amplifier, Analog Master, and its peripheral circuit. On the received sig-
nal from a line transformer (HYBSR), diffraction of signal transmission is attenuated using the hybrid circuit,
and the frequency of signal is limited to a certain band using a second LPF.
The signal is input to the analog front end via the analog SW for switching over between HYSIG and the
gain switching amplifier. 1300-Hz signal and remote signal are detected from HYSIG by switching SW1.
1.1.11. Transmission Signal Control Circuit
This circuit consists of Operational Amplifier, Analog Master, and its peripheral circuit. On the signal trans-
mission from the analog front end, frequency of the signal is limited to a certain band using a second LPF,
and diffraction of the signal to a reception circuit is attenuated using the hybrid circuit. The signal is sent out
from the line transformer.
To Line
To Speaker
Pendulum
24.576MHz
Analog
Master
Analog
Front
End
DSP
S-RAM
ROM
CPU BUS
Modem Circuit Block Diagram
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