R8C/1A Group, R8C/1B Group 14. Timers
Rev.1.30 Dec 08, 2006 Page 118 of 315
REJ09B0252-0130
Figure 14.8 Operating Example in Pulse Width Measurement Mode
FFFFh
n
0000h
Counter contents (hex)
n = high level: the contents of TX register, low level: the contents of PREX register
Count start
Count stop
Underflow
Count stop
Count start
Period
TXS bit in
TXMR register
1
0
Measured pulse
(CNTR0i pin input)
1
0
IR bit in INT1IC
register
1
0
IR bit in TXIC
register
1
0
Conditions: “H” level width of measured pulse is measured. (R0EDG = 1)
i = 0 to 1
Set to 1 by program
Set to 0 when interrupt request is acknowledged, or set by program
Set to 0 when interrupt request is acknowledged, or set by program
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