Renesas R8C series

R8C/1A Group, R8C/1B Group 15. Serial Interface
Rev.1.30 Dec 08, 2006 Page 157 of 315
REJ09B0252-0130
Figure 15.6 Registers U0C1 to U1C1, and UCON
UARTi Transmit / Receive Control Register 1 (i = 0 or 1)
Symbol Address After Reset
U0C1 00A5h 02h
U1C1 00ADh 02h
Bit Symbol Bit Name Function RW
NOTE :
1.
b3 b2 b1 b0
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Transmit enable bit 0 : Disables transmission.
1 : Enables transmission.
Transmit buffer empty flag
0 : Disables reception.
1 : Enables reception.
b7 b6 b5 b4
The RI bit is set to 0 w hen the higher byte of the UiRB register is read out.
RW
TI RO
0 : Data in UiTB register
1 : No data in UiTB register
TE
RE
—
(b7-b4)
—
Receive enable bit
RO
RW
RI
Receive complete flag
(1)
0 : No data in UiRB register
1 : Data in UiRB register
UART Transmit / Receive Control Register 2
Symbol Address After Reset
UCON
00B0h 00h
Bit Symbol Bit Name Function RW
0 : P1_5/RXD0
P1_7/CNTR00/INT10
_
_____
1 : P1_5/RXD0/CNTR01/INT11
_
_____
P1_7
NOTE :
1.
U1SEL0 RW
UART1 pin (P3_7/TXD1,
P4_5/RXD1) select bits
b5 b4
0 0 : P3_7, P4_5
0 1 : P3_7, RXD1
1 0 : Do not set.
1 1 : TXD1, RXD1
b3 b2
—
(b3)
b1 b0
0
U0RRM RW
U1IRS RW
UART0 continuous receive
mode enable bit
0 : Disables continuous receive mode.
1 : Enables continuous receive mode.
UART1 transmit interrupt
source select bit
0 : Transmit buffer empty (TI = 1)
1 : Transmit completed (TXEPT = 1)
0
RWU0IRS
UART0 transmit interrupt
source select bit
0 : Transmit buffer empty (TI = 1)
1 : Transmit completed (TXEPT = 1)
b7 b6 b5 b4
The CNTRSEL bit selects the input pin of the CNTR0 (INTI
_
____
) signal.
When the CNTR0 signal is output, it is output from the CNTR00 pin regardless of the CNTRSEL bit setting.
Reserved bit Set to 0.
CNTR0 signal pin select bit
(1)
RW
RWCNTRSEL
U1SEL1 RW
—
(b6)
Reserved bit Set to 0.
RW