Renesas R8C series User Manual

R8C/1A Group, R8C/1B Group 16. Clock Synchronous Serial Interface
Rev.1.30 Dec 08, 2006 Page 215 of 315
REJ09B0252-0130
Figure 16.35 Operating Timing in Master Receive Mode (I
2
C bus Interface Mode) (1)
SDA
(master output)
SCL
(master output)
1
8967453
b7
b6
b5
b4
b3
b2
b1
b0
b7
12
SDA
(slave output)
TDRE bit in
ICSR register
1
0
TEND bit in
ICSR register
1
0
ICDRR register
ICDRS register
Data 1
Processing
by program
(1) Set TEND and TRS bits to 0 before
setting TDRE bits to 0
A
(2) Read ICDRR register
Data 1
9
TRS bit in
ICCR1 register
1
0
RDRF bit in
ICSR register
1
0
A
(3) Read ICDRR register
Master transmit mode
Master receive mode

Renesas R8C series Specifications

General

Brand	Renesas
Model	R8C series
Category	Computer Hardware
Language	English