Renesas R8C series User Manual

R8C/1A Group, R8C/1B Group 17. A/D Converter
Rev.1.30 Dec 08, 2006 Page 233 of 315
REJ09B0252-0130
Figure 17.1 Block Diagram of A/D Converter
AVSS
Data bus
Resistor ladder
VCUT = 0
VCUT = 1
VREF
Successive conversion register
AD register
ADCON0
Decoder
Vcom
VIN
P1_0/AN8
CH2 to CH0 = 100b
P1_1/AN9
CH2 to CH0 = 101b
P1_2/AN10
CH2 to CH0 = 110b
P1_3/AN11
CH2 to CH0 = 111b
ADGSEL0 = 1
ADGSEL0 = 0
ADCAP = 1
Software trigger
ADCAP = 0
Trigger
Comparator
CH0 to CH2, CKS0: Bits in ADCON0 register
CKS1, VCUT: Bits in ADCON1 register
Timer Z
interrupt request
CKS0 = 1
CKS1 = 1
CKS1 = 0
f1
φAD
A/D conversion rate selection
CKS0 = 0
f2
f4
CKS0 = 1
CKS0 = 0
fRING-fast

Renesas R8C series Specifications

General

Brand	Renesas
Model	R8C series
Category	Computer Hardware
Language	English