Renesas R8C series - Page 339

C - 6
REVISION HISTORY R8C/1A Group, R8C/1B Group Hardware Manual
1.30 Dec 08, 2006 71 Figure 10.8 added
73 Figure 10.9 added
76 10.6.1 revised
10.6.2 “Program example to execute the WAIT instruction” revised
98 Table 12.6 revised
104 Figure 13.2; WDC After Reset “00011111b” → “00X11111b”
160 Figure 15.7 revised
165 Figure 15.10 revised
168 15.3 “To check receive errors, read the UiRB register and then use the
read data.” added
202 Figure 16.24 NOTE 1 revised
234 Figure 17.2; ADCON0 NOTE 2 revised
236 Table 17.2 Stop conditions “when the ADCAP bit is set to 0 (software
trigger)” added
237 Figure 17.4; ADCON0 NOTE 2 revised
239 Figure 17.5; ADCON0 NOTE 2 revised
252 18.4.1, 18.4.2 td(SR-ES) → td(SR-SUS)
276 Table 19.2; Parameter: OCD2 = 1 On-chip oscillator clock selected
revised
296 20.1.1 revised
20.1.2 “Program example to execute the WAIT instruction” revised
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