Renesas R8C series

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R8C/1A Group, R8C/1B Group 5. Programmable I/O Ports

Rev.1.30 Dec 08, 2006 Page 28 of 315

REJ09B0252-0130

Figure 5.4 Configuration of I/O Pins

MODE

MODE signal input

(Note 1)

RESET

RESET signal input

(Note 1)

NOTE :

1. symbolizes a parasitic diode.

Ensure the input voltage to each port will not exceed VCC.

Main Page

Table of Contents10
Overview19
Applications19
Performance Overview20
Block Diagram22
Product Information23
Pin Assignments27
Pin Functions30
Central Processing Unit (CPU)33
Data Registers (R0, R1, R2, and R3)34
Address Registers (A0 and A1)34
Frame Base Register (FB)34
Interrupt Table Register (INTB)34
Program Counter (PC)34
User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)34
Static Base Register (SB)34
Flag Register (FLG)34
Carry Flag (C)34
Debug Flag (D)34
Interrupt Enable Flag (I)35
Stack Pointer Select Flag (U)35
Processor Interrupt Priority Level (IPL)35
Reserved Bit35
Memory36
R8C/1A Group36
R8C/1B Group37
Special Function Registers (Sfrs)38
Programmable I/O Ports42
Functions of Programmable I/O Ports42
Effect on Peripheral Functions42
Pins Other than Programmable I/O Ports42
Port Settings50
Unassigned Pin Handling55
Resets56
Hardware Reset58
When Power Supply Is Stable58
Power on58
Power-On Reset Function60
Voltage Monitor 1 Reset61
Voltage Monitor 2 Reset61
Watchdog Timer Reset61
Software Reset61
Voltage Detection Circuit62
VCC Input Voltage68
Monitoring Vdet168
Monitoring Vdet268
Digital Filter68
Voltage Monitor 1 Reset70
Voltage Monitor 2 Interrupt and Voltage Monitor 2 Reset71
Processor Mode73
Processor Modes73
Bus75
10. Clock Generation Circuit76
Main Clock83
On-Chip Oscillator Clocks84
Low-Speed On-Chip Oscillator Clock84
High-Speed On-Chip Oscillator Clock84
CPU Clock and Peripheral Function Clock85
System Clock85
CPU Clock85
Peripheral Function Clock (F1, F2, F4, F8, F32)85
Fring and Fring12885
Fring-Fast85
Fring-S85
Power Control86
Standard Operating Mode86
Wait Mode87
Stop Mode90
Oscillation Stop Detection Function92
How to Use Oscillation Stop Detection Function92
Notes on Clock Generation Circuit94
Stop Mode94
Wait Mode94
Oscillation Stop Detection Function94
Oscillation Circuit Constants94
High-Speed On-Chip Oscillator Clock94
11. Protection95
12. Interrupts96
Interrupt Overview96
Types of Interrupts96
Software Interrupts97
Special Interrupts98
Peripheral Function Interrupt98
Interrupts and Interrupt Vectors99
Interrupt Control101
INT Interrupt109
INT0 Interrupt109
INT0 Input Filter110
INT1 Interrupt111
INT3 Interrupt112
Key Input Interrupt114
Address Match Interrupt116
Notes on Interrupts118
Reading Address 00000H118
SP Setting118
External Interrupt and Key Input Interrupt118
Watchdog Timer Interrupt118
Changing Interrupt Sources119
Changing Interrupt Control Register Contents120
13. Watchdog Timer121
Count Source Protection Mode Disabled124
Count Source Protection Mode Enabled125
14. Timers126
Timer X127
Timer Mode130
Pulse Output Mode131
Event Counter Mode133
Pulse Width Measurement Mode134
Pulse Period Measurement Mode137
Notes on Timer X140
Timer Z141
Timer Mode146
Programmable Waveform Generation Mode148
Programmable One-Shot Generation Mode151
Programmable Wait One-Shot Generation Mode154
Notes on Timer Z158
Timer C159
Input Capture Mode165
Output Compare Mode167
Notes on Timer C169
15. Serial Interface170
Clock Synchronous Serial I/O Mode176
Polarity Select Function179
LSB First/Msb First Select Function179
Continuous Receive Mode180
Clock Asynchronous Serial I/O (UART) Mode181
CNTR0 Pin Select Function184
Bit Rate185
Notes on Serial Interface186
16. Clock Synchronous Serial Interface187
Mode Selection187
Clock Synchronous Serial I/O with Chip Select (SSU)188
Transfer Clock197
SS Shift Register (SSTRSR)199
Interrupt Requests200
Communication Modes and Pin Functions201
Clock Synchronous Communication Mode202
Operation in 4-Wire Bus Communication Mode209
SCS Pin Control and Arbitration215
Notes on Clock Synchronous Serial I/O with Chip Select216
I 2 C Bus Interface217
Transfer Clock227
Interrupt Requests228
C Bus Interface Mode229
Clock Synchronous Serial Mode240
Noise Canceller243
Bit Synchronization Circuit244
Examples of Register Setting245
Notes on I 2 C Bus Interface249
17. A/D Converter250
One-Shot Mode254
Repeat Mode256
Sample and Hold258
A/D Conversion Cycles258
Internal Equivalent Circuit of Analog Input Block259
Inflow Current Bypass Circuit260
Output Impedance of Sensor under A/D Conversion261
Notes on A/D Converter262
18. Flash Memory263
Overview263
Memory Map265
Functions to Prevent Rewriting of Flash Memory267
ID Code Check Function267
ROM Code Protect Function268
CPU Rewrite Mode269
EW0 Mode270
EW1 Mode270
Software Commands279
Status Register284
Full Status Check285
Standard Serial I/O Mode287
ID Code Check Function287
Parallel I/O Mode291
ROM Code Protect Function291
Notes on Flash Memory292
CPU Rewrite Mode292
19. Electrical Characteristics294
20. Usage Notes314
Notes on Clock Generation Circuit314
Stop Mode314
Wait Mode314
Oscillation Stop Detection Function314
Oscillation Circuit Constants314
High-Speed On-Chip Oscillator Clock314
Notes on Interrupts315
Reading Address 00000H315
SP Setting315
External Interrupt and Key Input Interrupt315
Watchdog Timer Interrupt315
Changing Interrupt Sources316
Changing Interrupt Control Register Contents317
Precautions on Timers318
Notes on Timer X318
Notes on Timer Z318
Notes on Timer C319
Notes on Serial Interface320
Precautions on Clock Synchronous Serial Interface321
Notes on Clock Synchronous Serial I/O with Chip Select321
Notes on I 2 C Bus Interface322
Notes on A/D Converter323
Notes on Flash Memory324
CPU Rewrite Mode324
Notes on Noise326
Inserting a Bypass Capacitor between VCC and VSS Pins as a Countermeasure against Noise and Latch-Up326
Countermeasures against Noise Error of Port Control Registers326
21. Notes on On-Chip Debugger327
Appendix 1. Package Dimensions328
Appendix 2. Connection Examples between Serial Writer and On-Chip Debugging Emulator330
Appendix 3. Example of Oscillation Evaluation Circuit331
Register Index332

Renesas R8C series

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