Renesas R8C series User Manual

R8C/1A Group, R8C/1B Group 10. Clock Generation Circuit
Rev.1.30 Dec 08, 2006 Page 59 of 315
REJ09B0252-0130
Figure 10.1 Clock Generation Circuit
S
Q
R
1/2 1/2
1/2 1/2 1/2
S
Q
R
HRA00
HRA01 = 1
HRA01 = 0
On-chip oscillator clock
CM14
Voltage
detection
circuit
CPU clock
a
b
c
d
e
OCD2 = 0
OCD2 = 1
Divider
Oscillation
stop
detection
Main clock
XOUT
CM13
CM05
XIN
CM02
WAIT
instruction
CM10 = 1(Stop mode)
a
d
c
h
b
CM06 = 0
CM17 to CM16 = 11b
CM06 = 1
CM06 = 0
CM17 to CM16 = 10b
CM06 = 0
CM17 to CM16 = 01b
CM06 = 0
CM17 to CM16 = 00b
Detail of divider
Oscillation Stop Detection Circuit
Pulse generation
circuit for clock
edge detection and
charge, discharge
control circuit
Main clock
Forcible discharge when OCD0
(1)
=0
Charge,
discharge
circuit
Oscillation Stop Detection
Interrupt Generation
Circuit Detection
Watchdog
Timer Interrupt
OCD2 bit switch signal
CM14 bit switch signal
Oscillation stop
detection,
Watchdog timer,
Voltage monitor 2
interrupt
e
g
UART0
A/D
Converter
Timer C Timer ZTimer X
fRING-fast
fRING
fRING-S
g
f1
f2
f4
f8
f32
h
INT0
1/128
fRING128
Watchdog
timer
OCD1
(1)
NOTE :
1. Set the same value in bits OCD1 and OCD0.
High-speed
on-chip
oscillator
Low-speed
on-chip
oscillator
Power-on
reset circuit
CM02, CM05, CM06: Bits in CM0 register
CM10, CM13, CM14, CM16, CM17: Bits in CM1 register
OCD0, OCD1, OCD2: Bits in OCD register
HRA00, HRA01: Bits in HRA0 register
Voltage Watch
2 Interrupt
System clock
HRA1 register
HRA2 register
Frequency adjustable
CM13
UART1
I
2
C bus
SSU
RESET
Power-on reset
Software reset
Interrupt request

Renesas R8C series Specifications

General

Brand	Renesas
Model	R8C series
Category	Computer Hardware
Language	English