2.11 Overcurrent protection
219
7SA522 Manual
C53000-G1176-C155-3
Overcurrent Stages
I
P
, 3I
0P
(IDMT pro-
tection with ANSI
c h a r a c t e r i s t i c s )
In the case of the inverse overcurrent stages, various characteristics can be selected,
depending on the ordering version and the configuration (address). With the ANSI
characteristics (address %DFN8S2& = 72&$16,) are available at address
$16,&XUYH:
,QYHUVH,
6KRUW,QYHUVH,
/RQJ,QYHUVH,
0RGHUDWHO\,QY,
9HU\,QYHUVH,
([WUHPHO\,QY and
'HILQLWH,QY.
For the setting of the current thresholds ,S! (address ) and ,S3,&.83 (ad-
dress ) the same considerations as for the overcurrent stages of the definite time
protection (see above) apply. In this case it must be noted that a safety margin
between the pickup threshold and the set value has already been incorporated. Pickup
only occurs at a current which is approximately 10 % above the set value.
The above example shows that the maximum expected operating current may directly
be applied as setting here.
Primary: Set value IP = 630 ,
Secondary: Set value IP = 5.25 A, i.e. (630 A / 600 A) · 5 A.
The time multiplier setting 7LPH'LDO7',S (address ) is derived from the
grading coordination plan applicable to the network. If implemented as emergency
overcurrent protection, shorter tripping times are advisable (one grading time step
above the fast tripping stage), as this function is only activated in the case of the loss
of the local
measured voltage.
The time multiplier setting 7LPH'LDO7',S (address ) can usually be set
smaller according to a separate earth fault grading plan. If only the phase currents are
to be monitored, set the pickup value of the earth fault stage to ∞.
In addition to the current-dependent delays, a delay of constant length can be set, if
necessary. The setting 7,S$GG (address for phase currents) and 7,S
$GG (address for earth currents) are in addition to the time delays resulting from
the set curves.
The setting parameter ,,S7HOH%, (address ) determines if it is possible
to use the binary input ´!2&,QVW75,3µ (F.No. 7110) to bypass the trip delays
7LPH'LDO7',S (address ) including the additional time 7,S$GG (address
) and 7LPH'LDO7',S (address ) including the additional time 7,S
$GG (address ). The binary input (if allocated) is applied to all stages of the time-
overcurrent protection. With ,,S7HOH%, = <(6 you can set the IP stages to
trip immediately after the pickup, only if the binary input is activated. Set time delays
for ,,S7HOH%, = 12 are always activated.
If the IP stage is to trip when switching the line on to a fault with or without a short
delay, 627)7LPH'(/$< (address , see above and refer to Subsection “Gen-
eral”), the parameter ,,S627) (address ) is set to <(6. We recommend,
however, not to choose the sensitive setting for the switch on to a fault function as en-
ergizing of the line on to a fault should cause a large fault current. It is important to
avoid that the selected stage picks up in a transient way during line energization.
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