3.3 Commissioning
423
7SA522 Manual
C53000-G1176-C155-3
Checking at Per-
missive Scheme
Requirements: 7HOHSURW'LVW is set in address to one of the comparison
schemes using a permissive signal, i.e. 3277 or 81%/2&.,1*. Furthermore, )&7
7HOHS'LV is switched 21 at address . Naturally, the corresponding send
and receive signals must also be assigned to the corresponding binary output and
input. For the echo function, the echo signal must be assigned separately to the trans-
mit output.
Detailed information on the function of permissive scheme is available in Section 2.6.
A simple check of the signal transmission path from one line end is possible via the
echo function if these release techniques are used. The echo function must be acti-
vated at both line ends i.e. address )&7:HDN,QIHHG = (&+2RQO\; with the
setting (&+2DQG75,3 a trip command may occur at the remote end of the check!
A short-circuit is simulated outside Z1, with 3277 or 81%/2&.,1* inside Z1B. This
may be done with secondary injection test equipment. As the device at the opposite
line end does not pick up, the echo function comes into effect there, and consequently
a trip command is issued at the line end being tested.
If no trip command appears, the signal transmission path must be checked again, es-
pecially also the assignment of the echo signals to the transmit outputs.
In case of a phase-segregated transmission the above-mentioned checks are carried
out for each phase. The correct phase allocation is also to be checked.
This test must be performed at both line ends, in the case of three terminal lines at
each end for each signal transmission path.
The functioning of the echo delay time and the derivation of the circuit breaker switch-
ing status should also be tested at this time (the functioning of the protection at the
opposite line end
is tested):
The circuit breaker on the protected feeder must be opened, as must be the circuit
breaker at the opposite line end. As described above, a fault is again simulated. A
receive signal impulse delayed by somewhat more than twice the signal transmission
time appears via the echo function at the opposite line end, and the device issues a
trip command.
The circuit breaker at the opposite line end
is now closed (while the isolators remain
open). After simulation of the same fault, the receive and trip command appear again.
In this case however, they are additionally delayed by the echo delay time of the
device at the opposite line end (0.04 s presetting, address 7ULS(FKR'(/$<).
If the response of the echo delay is opposite to the sequence described here, the op-
erating mode of the corresponding binary input (H–active/L–active) at the opposite
line
end must be rectified.
The circuit breaker must be opened again.
This test must be performed at both line ends, on a three terminal line at each line end
for each transmission path. Finally, please observe the last margin heading “Important
for All Schemes”!
Checking in
Blocking Scheme
Requirements: 7HOHSURW'LVW is configured in address to one of the com-
parison schemes with blocking signal, i.e. %/2&.,1*. Furthermore, address )&7
7HOHS'LV is switched 21 at address . Naturally, the corresponding send and
receive signals must also be assigned to the corresponding binary output and input.
For more details about the function of the blocking scheme refer to Subsection 2.6. In
the case of the blocking scheme, communication between the line ends is necessary.
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