ST UM2967

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Figure 6. STM32U5A9J-DK bottom layout view

DT56158V1

Boot0 switch

SW1

Temperature

sensor (U18)

Expansion connectors

(CN9 and CN10)

IDD 3V3

header (JP1)

IDD

header (JP2)

IDD_MCU

header (JP3)

Power source

header (JP4)

MIPI10

connector

(CN11)

Hexadeca-SPI

PSRAM (U34)

STM32U5A9

MCU (U25)

Octo-SPI flash

(U22)

eMMC flash

(U26)

TNRST

header (JP5)

STLK_NRST

header (JP6)

UM2967

Product layout (top and bottom)

UM2967 - Rev 1

page 10/68

Main Page

Figure 1. STM32U5A9J-DK Top View1
Figure 2. STM32U5A9J-DK Bottom View1
Features2
Ordering Information3
Codification3
Table 1. List of Available Products3
Table 2. Codification Explanation3
Development Environment4
System Requirements4
Development Toolchains4
Laser Consideration5
Figure 3. Class 1 Laser Product Label5
Conventions6
Table 3. ON/OFF Convention6
Quick Start7
Hardware Layout and Configuration8
Hardware Block Diagram8
Figure 4. Hardware Block Diagram8
Product Layout (Top and Bottom)9
Figure 5. STM32U5A9J-DK Top Layout View9
Figure 6. STM32U5A9J-DK Bottom Layout View10
Mechanical Drawings11
Main Board Top11
Figure 7. MB1829 Top11
Main Board Bottom12
Figure 8. MB1829 Bottom12
Daughterboard Top13
Figure 9. MB1835 Top13
Daughterboard Bottom14
Figure 10. MB1835 Bottom14
Embedded STLINK-V3E15
Figure 11. Default Configuration to Use STLINK-V3E15
STLINK-V3E Deactivation (Reset Mode)16
STLINK-V3E TNRST Disconnection16
Table 4. JP6 STLK_NRST Configuration16
Table 5. JP5 TNRST Configuration16
Figure 12. JP6 STLK_NRST Default Configuration16
Figure 13. JP5 TNRST Default Configuration16
Drivers17
STLINK-V3E VCP Configuration17
STLINK-V3E I/O Interface17
Table 6. STLINK-V3E I/O Interface17
Figure 14. USB Composite Device17
Power Supply18
Power Diagram18
Figure 15. Power Diagram19
Power Source Selection20
STLK (for Compatibility with USB Host Port Legacy)20
Table 7. 5V Selection Configuration Jumper (JP4)20
Figure 16. STLK (JP4) from USB STLK (CN5)20
Chgr21
Usbc21
Figure 17. CHGR (JP4) from USB STLK (CN5)21
Figure 18. USBC (JP4) from USB Type-C ® (CN4)21
E5V22
Microcontroller Power22
Figure 19. E5V (JP4) from 5V_IN/GND (CN9)22
Vdd_Mcu23
Internal SMPS23
Analog Power Supplies23
Table 8. IDD Configuration (JP1, JP2, and JP3)23
Figure 20. Jumpers Default Configuration (JP1, JP2, and JP3)23
Other Peripheral Power24
Clock Sources25
Boot Options26
Figure 21. BOOT0 Default Configuration, Set on "0" (SW1)26
Board Functions27
Round TFT DSI Display Module Board and DSI_V3 Connector27
Display Management27
Touch-Panel Management27
Display and DSI_V3 I/O Interface28
Other DSI_V3 Compatible Peripherals28
Table 9. 2.47" Display and DSI_V3 I/O Interface28
USB Type-C (High Speed, Sink Only)29
USB Type-C ® Sink Only29
USB 2.0 High-Speed Interface30
USB Type-C ® Function Interface30
Table 10. Ucpd.adcx Voltage Range and Threshold According to Power Source Capability30
Table 11. USB Type-C ® Function Interface30
Table 33. Solder Bridge Configuration30
Hexadeca-SPI PSRAM Memory31
Table 12. Hexadeca-SPI PSRAM I/O Interface31
Octo-SPI Flash Memory32
Emmc Flash Memory32
Table 13. Octo-SPI Flash I/O Interface32
Audio Codec (Not Used)33
20-Pin Audio Connector (Not Used)33
Table 14. Emmc Flash I/O Interface33
Table 15. Audio Codec I/O Interface33
Time-Of-Flight Sensor34
Table 16. 20-Pin Audio Function I/O Interface34
Table 17. Tof Sensor I/O Interface34
Figure 22. Class 1 Laser Product Label34
Temperature Sensor35
Expansion Connectors35
User Button Function35
Table 18. Temperature Sensor I/O Interface35
Reset Button and Reset Function36
Buttons and Leds Function36
Table 19. Buttons and Leds36
SWD Debug/Program/Trace and JTAG/USART37
User Constraints for CN11 or CN3 Connectors37
Table 20. Debug/Program/Trace and JTAG/USART Interface Overview37
SWD, SWO, JTAG, and USART I/O Interface38
Table 21. SWD, SWO, JTAG, and USART Function I/O Interface38
Connectors39
USB Type-C ® Receptacle Connector (CN4)39
Table 22. USB Type-C ® Receptacle Connector (CN4)39
Figure 23. USB Type-C ® Receptacle Connector (Front View) (CN4)39
Figure 24. USB Type-C ® Connector Pinout (CN4)39
Debug Connector (CN11)40
MIPI10 Debug Connector (Default Configuration)40
Figure 25. MIPI10 Debug Connector (CN11)40
STDC14 Debug Connector (Option)41
Table 23. MIPI10 on STDC14 Footprint41
Table 24. STDC14 Connector Pinout41
Figure 26. STDC14 Debug Connector (CN11)41
TAG Connector (CN3)42
Table 25. TAG Connector Pinout42
Figure 27. TAG Connector (CN3)42
Figure 28. TC2050-IDC-NL Cable42
DSI_V3 Display Board Connector (CN2)43
Table 26. DSI_V3 Connector Pin Assignment (CN2)43
Figure 29. DSI_V3 Display Connector (CN2)43
Audio Jack (Not Used) (CN6)44
Figure 30. Audio Jack Connector (CN6)44
STLINK-V3E USB Micro-B Connector (CN5)45
Table 27. Audio Jack (CN6) Pinout45
Table 28. USB Micro-B (CN5) Pinout45
Figure 31. USB Micro-B Connector (CN5)45
Expansion Connectors (CN9 and CN10)46
Pin Assignment and Connectors46
Figure 32. Female Expansion Connectors (CN9 and CN10)46
Table 29. Connector Pinout (Bottom View) (CN9)47
Table 30. Connector Pinout (Bottom View) (CN10)47
20-Pin Audio Connector (Not Used) (CN1)48
Table 31. 20-Pin Audio Connector Pinout (CN1)48
Figure 33. 20-Pin Audio Connector (CN1)48
Jumpers and Solder Bridges49
Jumpers49
Table 32. Jumper Configuration49
Solder Bridges50
STM32U5A9NJH6Q GPIO and Pin Assignment54
Table 34. STM32U5A9NJH6Q GPIO and Pin Assignment54
STM32U5A9J-DK Product Information59
Product Marking59
STM32U5A9J-DK Product History59
Table 35. Product History59
Board Revision History60
Table 36. Board Revision History60
Federal Communications Commission (FCC) and Innovation, Science and Economic61
Development Canada (ISED) Compliance Statements61
FCC Compliance Statement61
ISED Compliance Statement61
Revision History62
Table 37. Document Revision History62
Table of Contents63
List of Tables66
List of Figures67

Table of Contents

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