ST UM2967 User Manual

8.1 STLINK-V3E deactivation (Reset mode)
It is simple to deactivate the STLINK-V3E function by moving the JP5 jumper on the JP6 header, to connect
STLK_ NRST to GND (refer to Figure 12 and Table 4). Programming, debugging, and monitoring through
ST-LINK are impossible in this Reset state, where all STLINK-V3E PIOs are in high impedance.
Attention: The Reset mode is useful to connect an external probe to MIPI10/STDC14 debug (CN11) or TAG (CN3)
connector for embedded STM32U5A9NJ debug.
In this Reset mode, when JP6 is ON, 5V selection JP4 STLK is not functional, but any other 5V selection on JP4
might be used to power the board from other sources without current onboard protection.
Figure 12. JP6 STLK_NRST default configuration
Table 4. JP6 STLK_NRST configuration
Reference
Jumper
(1)
Function Comment
JP6
(2)
STLK_NRST
OFF STLINK-V3E active STLINK-V3E detects USBSTLK plug on CN5.
ON STLINK-V3E Reset state
Set STLINK-V3E in Reset mode (All I/Os in high impedance).
There is no power from JP4 STLK.
1. The default setting is in bold.
2. In case JP6 is ON, JP5 must be OFF.
8.2
STLINK-V3E TNRST disconnection
It is possible to physically isolate the STLINK-V3E output reset from the main STM32U5A9NJ NRST function by
disconnecting JP5 (refer to Figure 13 and Table 5).
Figure 13. JP5 TNRST default configuration
Table 5. JP5 TNRST configuration
Reference
Jumper
(1)
Function Comment
JP5
(2)
TNRST
ON
T_NRST (PA6)
STLINK-V3E output reset isolated from NRST of STM32U5A9NJ.
OFF STLINK-V3E output reset connected to NRST of STM32U5A9NJ.
1. The default setting is in bold.
2. In case JP5 is ON, JP6 must be OFF.
UM2967
STLINK-V3E deactivation (Reset mode)
UM2967 - Rev 1
page 16/68

ST UM2967 Specifications

General

Brand	ST
Model	UM2967
Category	Computer Hardware
Language	English