ACRONYM DICTIONARY
The following listing explains some
of
the less obvious acronyms and signal labels used on the schematics. Acronyms
and labels not shown
in
this listing may be included
in
the circuit descriptions (Section 3) and should be obvious If thought
is
given
to
the intended circuit function.
+CH1
SIG-+CH4
SIG
..
. posltive preamp output signals
+HORIZ
SIG ... positive horizontal output signal
+ VERT SIG ... posi1ive vertical output signal
-CH1
SIG--CH4
SIG .
..
negative preamp output signals
-HORIZ
SIG .
..
negative horizontal output signal
-VERT
SIG
...
negative vertical output signal
A SWP CLK ... A sweep clock
A TIM REF ... A timing reference
A TRIG CLK .
..
A trigger clock
A TRIG LVL...A trigger level
A0-A15
...
address bits
0-15
AHO ... A holdall
ATTN CLK .
..
attenuator clock
ATTN STRB ... attenuator strobe
B SWP CLK
...
B sweep clock
B TIM REF ... B timing reference
B TRIG CLK ... B trigger
clock
B TRIG LVL...B trigger level
B1-B12
... DAC input bits
1-12
BD0-BD7
... buffered data bi
ts
0-7
BDCA ... bypass delay comparator A
BDCB ... bypass delay comparator B
BDTL.
..
B delayed trigger level selector
BHO ... B holdoff
BWLB
..
. bandwidth limited B signal
BYP ... bypass
CAO-CA6
...
character address bits
0-7
CD1
-CD6
... character data bits
1-7
CH1
OVL.
..
channel 1 overload
CH1
PA CLK
...
CH1
preamp clock
CH1
POS ... channel 1 position
CH1
PRB ... channel 1 probe
CH1
TRIG PICKOFF ... channel 1 trigger pickoff
CH1
VAR
..
. channel 1 variable
CH2
APO+
... channel 2 auxiliary pickoff, noninverting
CH2 OVL.
..
channel 2 overload
CH2
PA
CLK ... channel 2 preamp clock
CH2 POS .
..
channel 2 position
CH2 PRB ... channel 2 probe
CH2 TRIG PICKOFF ... channel 2 trigger pickoff
CH2 V AR .
..
channel 2 variable
CH3 PRB ... channel 3 probe
CH3 TRIG PICKOFF
..
. channel 3 trigger pickoff
CH4 POS ...
channel 4 position
CH4 PRB
..
. channel 4 probe
CH4 TRIG PICKOFF ... channel 4 trigger pickoff
CLK ... clock
CNTR RESET ... counter reset
COL
0-COL
4 .
..
column
0-column
4 .
..
swltch matrix columns
0-4
CONT DATA .
..
control
data
CTC ... capacitor, timing compensation
D0-D7
... data bits
0-7
DAC
LSB
CLK ... DAC least significant
data
bits clock
DAC
MSB
CLK ... DAC
most
significant data bits clock
DAC MUX1
IN
... DAC multiplexer 1 input
DAC MUXO INH ... DAC multiplexer 0 inhibit
DAC MUX1 INH .
..
DAC multiplexer 1 inhibit
DAC MUX2 INH .
..
DAC multiplexer 2 inhibit
DAC MUX1
A0
... DAC multiplexer 1, address bit 0
DAC MUX1 A1...DAC multiplexer 1, address bit 1
DAC MUX1 A2
..
. DAC multiplexer 1, address bit 2
DAC MUX1
IN
.
..
DAC multiplexer 1 input
·
DDO-DD7
...
dot
data bits
0-7
Dl...display intensity
DIR
..
. display intensity revised
DISP SEQ CLK ... display sequencer clock
DL Y A ... delay A
DL Y B .
..
delay B
DL Y REF 0
..
. delay reference 0
DL Y REF 1 ... delay reference 1
DOTOK ...
dot
ok
FB .. .feedback
HORIZ OUT...channel
1 output
to
horizontal
in
X-Y
HORIZ POS ... horizontal position
HORIZ VAR. .. horizontal variable
LED CLK ... LED clock
LED DATA .
..
front panel LED data
LINE TRIG
...
60 Hz line trigger
LINE UP ... ac power
is
above minimum
MR
... memory ready
PORT1 CLK ... port 1 clock
PORT2 CLK ... port 2 clock
PORT3 INH ... port 3 inhibit
PWR DOWN
..
. power
down
PWR UP
..
. power up
QP1
+ ... quad pole 1 plus
QP2 + .
..
quad pole 2 plus
R/W
.
..
read/write
R/W
DL Y'D .
..
read/wrlte delayed
R/W DL YD ... read/write delayed
READOUT HORIZ OUT ... readout horizontal output
READOUT VERT OUT...readout vertical output
RO DO
..
. readout data
out
ROl...readout intensity
ROIR .
..
readout intensity
revised
ROSFRAME.
..
readout subframe
ROW
0-ROW
9 ... swltch matrix rows
0-9
SEC/DIV VAR.
..
SEC/DIV variable
SSA
... A selected signal source
TRACE SEP ... trace separation
TRIG LED ... trigger LED
TRIG
LEVEL
.trigger level
TRIG STAT STRB .
..
trigger status strobe
TS1 + TS2 ... trace separation 1 and 2
TSO
...
trigger status output
TXY ... triggered X-Y
VAR OCT ... variable octopole (geometry)
VMA
..
. valid memory address
va OUT...variable quadrapole output
VZ OUT ... variablle Z-axis output
A AUXTRIG ... A auxiliary trigger
B AUXTRIG .
..
B auxiliary trigger
mv[
... bandwidth limit
!rS
...
delay select
~
... enable
HSA
.
..
horizontal select A
~
... horizontal select B
MAG
...
magnify
1ffiA
... reset delay adjust
Rc5A
..
. readout acknowledge
ROB
..
. readout blank
m5ri
...
readout request
~
... readout strobe 1
ROS2
...
readout strobe 2
~
... sweep gate A
to
Z axis
~
... sweep
gat
e A
SGBZ .
..
sweep gate B
to
Z axis
'Slffi .
..
sweep gate B
'FSA
.
..
trigger status A
~
.
..
trigger status B
VS'i-VS4
... vertical selects
1-4
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