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Texas Instruments CC2540DK-MINI User Manual

Texas Instruments CC2540DK-MINI
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When a 10-bit header is used, the MCU must ensure that an entire packet can fit in the Tx FIFO for auto
retransmission to be possible. This limits the maximum packet size based on the settings in
PRF_FIFO_CONF.
If an address is configured, it is the first byte transmitted. It is found based on the setting in
PRF_FIFO_CONF.TX_ADDR_CONF. It can be set to take the address from PRF_ADDR_ENTRY0, to read it
from the Tx FIFO, or to read an index n from the config byte in the FIFO and read the address from
PRF_ADDR_ENTRYn.ADDRESS. In other cases, n is always be assumed to be 0 in the following text. The
values of ENA0 and ENA1 in PRF_ADDR_ENTRYn.CONF are ignored for the transmitter; the primary sync
word is always transmitted.
The 9-bit or 10-bit header is transmitted next. If PRF_ADDR_ENTRYn.CONF.TXLEN is 0, the length field is
set to the number of payload bytes after the header, which is calculated from the length byte in the Tx
FIFO. If PRF_ADDR_ENTRYn.CONF.TXLEN is 1, the length field is set to 11 0011 for a 9-bit header and to
011 0011 for a 10-bit header. Note that a value of 0 for PRF_ADDR_ENTRYn.CONF.TXLEN may be used
regardless of the VARLEN setting in the receiver, as a receiver configured to use fixed length ignores the
length field. A value of 1 must only be used if the receiver is configured to use fixed length. The NO_ACK
bit transmitted is set according to bit 5 of the config byte read from the Tx FIFO if present, otherwise to 0.
If PRF_ADDR_ENTRYn.CONF.FIXEDSEQ is 1, the SEQ bits transmitted are set equal to bits 6 and 7 of the
config byte read from the FIFO. Otherwise, the SEQ bits are set to the value of
PRF_ADDR_ENTRYn.SEQSTAT.SEQ.
The payload (if any) is transmitted as given in the FIFO.
If configured, a CRC with the number of bytes given by PRF_CRC_LEN is transmitted at the end.
When a packet has been transmitted, the N_TX counter is incremented.
After transmission of a packet, the action depends on PRF_ADDR_ENTRYn.CONF.AA and the NO_ACK bit
in the transmitted header. If PRF_ADDR_ENTRYn.CONF.AA = 0 or NO_ACK = 1, no acknowledgment is
expected, and the action is as if a valid acknowledgment had been received.
If PRF_ADDR_ENTRYn.CONF.AA is 1 and the transmitted NO_ACK bit was 0, the LLE configures Rx to
listen for an acknowledgment. To listen for acknowledgment, the receiver is configured at a time given by
the PRF_TX_RX_TIME register. Synthesizer recalibration is performed only if there is time. The unit looks
for sync. The sync search times out at the time given by PRF_SEARCH_TIME. If sync is found, the packet
is received into the Rx FIFO. If PRF_PKT_CONF.ADDR_LEN is 1, the address byte is compared against
PRF_ADDR_ENTRYn.ADDRESS for the n that was used in transmission. If not matching, reception is
stopped.
Next, the 9-bit or 10-bit header is read. If PRF_ADDR_ENTRYn.CONF.VARLEN is 1, the length is fetched
from the header and compared against PRF_ADDR_ENTRYn.RXLENGTH. The maximum allowed value of
this register is 32. If the received length is greater than PRF_ADDR_ENTRYn.RXLENGTH, reception is
stopped and the device goes back to sync search. If PRF_ADDR_ENTRYn.CONF.VARLEN is 0, the length
field in the received header is ignored and the packet length is read from PRF_ADDR_ENTRYn.RXLENGTH,
which should normally be 0 in this case. The length is the number of bytes after the header and before the
CRC.
If a CRC field is present, it is checked using the polynomial configured in the BSP and the initialization
value from PRF_CRC_INIT. The result of the CRC is written in the MSB of the RES byte in the status field
if a status field is configured. If the CRC is not correct and PRF_FIFO_CONF.AUTOFLUSH_CRC is set, the
LLE sends a discard Rx FIFO command to remove the packet from the Rx FIFO.
The received sequence number is written to the config byte of the Rx FIFO if configured, but is otherwise
ignored.
If the Rx FIFO goes full while receiving an acknowledgment packet, the packet is discarded from the FIFO
and no more bytes are stored in the Rx FIFO, but the packet is received to its end. After that, it is checked
to see whether the packet would be discarded from the Rx FIFO anyway due to the setting of
PRF_FIFO_CONF. If so, the task proceeds as normally. Otherwise, the task ends after the packet is
received and an RXFIFOFULL error interrupt is raised. In this case, the treatment of the packet is as if the
acknowledgment were not successfully received. This means that the next time a transmit task is started,
the packet is retransmitted so that the receiver retransmits the ACK payload.
324
CC2541 Proprietary Mode Radio SWRU191C April 2009Revised January 2012
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Copyright © 20092012, Texas Instruments Incorporated

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Texas Instruments CC2540DK-MINI Specifications

General IconGeneral
BrandTexas Instruments
ModelCC2540DK-MINI
CategoryMicrocontrollers
LanguageEnglish

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