Toshiba Satellite Pro M10 Series - Page 25

1.2 System Unit Block Diagram 1 Hardware Overview
Satellite Pro M10 Series Maintenance Manual (960-431) 1-11
 Card Controller:
• Name: YEBISU3S
• This gate array has the following functions and components.
– PCI Interface (PCI Rev. 2.2)
– Chipset Interface
– CardBus/PC Card Controller (Yenta2 Ver. 2.2)
– SD Card Controller (SDHC Ver. 1.2)
– SD I/O Card Controller (Ver. 1.0)
– Smart Media Controller (SMHC Ver.01/SMIL 1.0)
– Smart Card I/F
– SIO (UART) Controller (MS Debug Port Specification Ver. 1.0)
– Docking Station Interface
– External device interface
 Graphic Controller:
• Name: nVIDIA Squish17
– AGP bus R2.0 ×4
– LCD I/F LVDS 2ch
– TV Encoder NTSC/PAL
– External VRAM: DDR-SDRAM 220MHz 32MB (64bit)
 LAN controller
• One ED82562 chip is used.
• This gate array has the following features:
− IEEE 802.3 10BASE-T compliant physical layer interface
− IEEE 802.3u Auto-Negotiation and 100BASE-TX support
− Digital adaptive equalization control
− Link status interrupt capability
− Boundary scan support
− 3-port LED support (speed, link and activity)
− 10BASE-T auto-polarity correction
− Diagnostic loopback mode
− 1:1 transmit transformer ratio support
− Low power (300mW typical in active transmit mode)
− Reduced power in "unplugged mode" (less than 50mW)
− Automatic detection of "unplugged mode"
− 3.3V device
− 48-pin Shrink Small Outline Package (SSOP)