Z8
®
CPU
User Manual
UM001604-0108 Instruction Set
150
In general, whenever an instruction format requires an 8-bit register address, that address
can specify any register location in the range 0–255 or a Working Register R0–R15. If, in
the above example, register
08h is a Working Register, the assembly syntax and resulting
object code would be:
Refer to the device product specification to determine the exact register file range avail-
able. The register file size varies by device type.
Z8
®
Instruction Summary
Table 39 provides the summary of Z8 instruction set.
ASM: ADD 43h, 08h (ADD dst, src)
OBJ: 04 08 43 (OPC src, dst)
ASM: ADD 43h, 08h (ADD dst, src)
OBJ: 04 08 43 (OPC src, dst)
Table 39. Summary of Z8 Instruction Set
Instruction and Operation
Address Mode
Op Code
Byte (Hex)
Flags Affected
dst src C Z S V D H
ADC dst, src
dst ← dst + src +C
† 1[ ] [[[[0 [
ADD dst, src
dst ← dst + src
† 0[ ] [[[[0[
AND dst, src
dst ← dst AND src
†5[ ]– [[0––
CALL dst DA D6 ––––––
SP ← SP–2
and PC ← dst
or @ SP ← PC
IRR D4
CCF
C ←NOT C
EF [ –––––
CLR dst R B0 ––––––
dst ← 0IRB1
COM dst R 60 – [ [ 0 – –
dst ← NOT dst IR 61
Note:
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