Z8
®
CPU
User Manual
UM001604-0108 Address Space
10
Error Conditions
Registers in the Z8
®
Standard Register File must be correctly used because certain condi-
tions produce inconsistent results and should be avoided.
•
Registers F3h and F5h–F9h are write-only registers. If an attempt is made to read
these registers,
FFh is returned. Reading any write-only register returns FFh.
•
When register FDh (Register Pointer) is read, the least significant four bits (lower nib-
ble) indicate the current Expanded Register File Bank. (For example,
0000 indicates
the Standard Register File, while
1010 indicates Expanded Register File Bank A.)
•
When Ports 0 and 1 are defined as address outputs, registers 00h and 01h return 1s in
each address bit location when reading.
•
Writing to bits that are defined as timer output, serial output, or handshake output has
no effect.
•
The Z8 CPU instruction DJNZ uses any general-purpose working register as a counter.
•
Logical instructions such as OR and AND require that the current contents of the
operand be read. They therefore do not function properly on write-only registers.
•
The WDTMR register must be written within the first 60 internal system clocks
(SCLK) of operation after a reset.
Z8 Expanded Register File
The standard register file of the Z8 CPU has been expanded to form 16 Expanded Register
File (ERF) Banks, as displayed in Figure 6 on page 11. Each ERF Bank consists of up to
256 registers (the same amount as in the Standard Register File) that can then be divided
into 16 Working Register Groups. This expansion allows for access to additional feature/
peripheral control and data registers.
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