Z8
®
CPU
User Manual
UM001604-0108 Input/Output Ports
75
•
Low EMI output drivers have resistance of 200 Ω (typical)
•
Low EMI Oscillator
•
All output drivers are approximately 25 percent of the standard drive
•
Internal SCLK ÷ TCLK = XTAL operation limited to a maximum of 4 MHz–250 ns
cycle time, when Low EMI Oscillator is selected and system clock (SCLK = XTAL,
SMR Reg. Bit D1 = 1)
For Z8
®
MCUs having the PCON register feature, the following bits control the Low EMI
options.
Low EMI Port 0—Port 0, D3 can be configured as a Low EMI Port by resetting this bit
(D3 = 0) or configured as a Standard Port by setting this bit (D3 = 1). The default value
is 1.
Low EMI Port 1—Port 1, D4 can be configured as a Low EMI Port by resetting this bit
(D4 = 0) or configured as a Standard Port by setting this bit (D4 = 1). The default value
is 1.
Low EMI Port 2—Port 2, D5 can be configured as a Low EMI Port by resetting this bit
(D5 = 0) or configured as a Standard Port by setting this bit (D5 = 1). The default value
is 1.
Low EMI Port 3—Port 3, D6 can be configured as a Low EMI Port by resetting this bit
(D6 = 0) or configured as a Standard Port by setting this bit (D6 = 1). The default value
is 1.
Low EMI OSC—This D7 bit of the PCON Register controls the Low EMI oscillator. A 1
in this location configures the oscillator with standard drive, while a 0 configures the
oscillator with low noise drive. The Low-EMI mode reduces the drive of the oscillator
(OSC). The default value is 1. XTAL ÷ 2 mode is not affected by this bit.
The maximum external clock frequency is 4 MHz when running in the Low EMI oscillator
mode.
Refer to the selected device product specification for availability of the Low EMI feature
and programming options.
Input Protection
All CMOS ROM Z8 MCUs have I/O pins with diode input protection. There is a diode
from the I/O pad to V
CC
and to V
SS
. See Figure 63 on page 76.
Note:
To Next Page
Loading...
Need help?
General
