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CPU

User Manual

UM001604-0108 Instruction Description

164

Call Procedure

Syntax

CALL dst

Instruction Format

Operation

SP ← SP–2

@SP ← PC

PC ← dst

The Stack pointer is decremented by two, the current contents of the Program Counter

(PC) (address of the first instruction following the CALL instruction) are pushed onto the

top of the Stack, and the specified destination address is then loaded into the PC. The PC

now points to the first instruction of the procedure.

At the end of the procedure a RET (return) instruction can be used to return to the original

program flow. RET pops the top of the Stack and replace the original value into the PC.

Address mode IRR can be used to specify a 4-bit Working Register Pair. In this format, the

destination Working Register Pair operand is specified by adding

1110b (Eh) to the high

nibble of the operand. For example, if Working Register Pair RR12 (CH) is the destination

operand, then

ECh is used as the destination operand in the Op Code.

Cycles

OPC

(Hex)

Address Mode

dst

OPC dst 20 D6 DA

OPC dst 20 D4 IRR

Flag Description

C Unaffected

Z Unaffected

S Unaffected

V Unaffected

D Unaffected

H Unaffected

Esrcor Edst

Note:

ZiLOG Z8 Series User Manual

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