ZiLOG Z8 Series User Manual

Z8
®
CPU
User Manual
UM001604-0108 Instruction Description
170
Compare
Syntax
CP dst, src
Instruction Format
Operation
dst–src
The source operand is compared to (subtracted from) the destination operand, and the
appropriate Flags are set accordingly. The contents of both operands are unaffected.
Address modes R or IR can be used to specify a 4-bit Working Register. In this format, the
source or destination Working Register operand is specified by adding
1110b (Eh) to the
high nibble of the operand. For example, if Working Register R12 (CH) is the destination
operand, then
ECh is used as the destination operand in the Op Code.
Example 1
Cycles
OPC
(Hex)
Address
Mode
dst src
OPC dst src
6A2rr
6A3rlr
OPC src dst
10 A4 R R
10 A5 R IR
OPC dst src
10 A6 R IM
10 A7 IR IM
Flag Description
C Cleared if there is a carry from the most significant bit of the result. Set otherwise
indicating a borrow.
Z Set if the result is zero; cleared otherwise.
S Set if result bit 7 is set (negative); cleared otherwise.
V Set if arithmetic overflow occurs; cleared otherwise.
D Unaffected.
H Unaffected.
Esrcor Edst
Note:

ZiLOG Z8 Series Specifications

General

Brand	ZiLOG
Model	Z8 Series
Category	Microcontrollers
Language	English