Z8
®
CPU
User Manual
UM001604-0108 Instruction Description
243
Example 1
If Working Register R3 contains 45h (01000101b) and Working Register R7 contains the
value
01h (00000001b) (bit 0 is being tested if it is 1), the statement:
TCM R3, R7
Op Code: 62 37
sets the Z Flag indicating bit 0 in the destination operand is 1. The V and S Flags are
cleared.
Example 2
If Working Register R14 contains the value F3h (11110011b), Working Register R5 con-
tains
CBh, and Register CBh contains 88h (10001000b) (bit 7 and bit 3 are being tested if
they are 1), the statement:
TCM R14, @R5
Op Code: 63 E5
resets the Z Flag, because bit 3 in the destination operand is not a 1. The V and S Flags are
also cleared.
Example 3
If Register D4h contains the value 04h (000001000b), and Working Register R0 contains
the value
80h (10000000b) (bit 7 is being tested if it is 1), the statement:
TCM D4h, R0
Op Code: 64 E0 D4
resets the Z Flag, because bit 7 in the destination operand is not a 1. The S Flag is set, and
the V Flag is cleared.
Example 4
If Register DFh contains the value FFh (11111111b), Register 07h contains the value
1Fh, and Register 1Fh contains the value BDh (10111101b) (bit 7, bit 5, bit 4, bit 3, bit 2,
and bit 0 are being tested if they are 1), the statement:
TCM DFh, @07h
Op Code: 65 07 DF
sets the Z Flag indicating the tested bits in the destination operand are 1. The S and V
Flags are cleared.
Example 5
If Working Register R13 contains the value F2h (11110010b), the statement:
TCM R13, #02h
Op Code: 66 ED, 02
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