ACT apricot - Page 137

SERIAL INTERFACE
accessed by the processors; one handles the transmit data
from the processors (transmit buffer), and one stores receive
data from
the serial channel (receive buffer).
The mode and operation of each channel is determined by
the contents of the command registers (Write Registers).
These are initialised with control words prior to any data
transfer over
the two serial channels, and may be modified
as
data transfer operations proceed. Seven Write Registers
are associated
with each channel. An eighth Write Register,
which is located in channel B is shared by both channels.
The information contained in the status registers (Read
Registers)
indicate the status within each channel. Two
Read Registers are associated with each channel. A third
register accessed via channel B is common to both channels.
The interrupt control logic section of the SIO assigns the
priority to the various sources of interrupts, generates the
interrupt output to the PIC and produces the interrupt
vector. The priority of the interrupts is fixed with channel A
always assigned a
higher priority than channel B. The order
of priority assigned
within each channel is receiver
interrupts (highest priority), followed by transmitter
interrupts, followed by external/status interrupts (lowest
priority).
Separate
transmit and receive data paths are provided
within the two serial communications channels.
The receiver ports are quadruply buffered by an input
shift register and three storage registers. The shift register
converts the incoming receive serial data into a parallel
byte.
The three storage registers are configured in a FIFO
(first in first out) arrangement. The first parallel data byte
from the shift register is loaded into the bottom of the FIFO
stack and then shifted through to the top at a rate,
determined by an internal clock.
The register at the top of the stack is the receive buffer
which acts as the storage buffer for the receive character
until read by the processors. Reading the character in the
receive buffer automatically transfers the next character (if
any) to the top of the stack.