ACT apricot - Page 175

SERIAL INTERFACE
TxCA Transmitter Clock. Input used to determine
the transmit baud rate of the RS232C channel.
When operating in asynchronous mode, a
facility exists
within the SIO to divide the
input clock frequency internally, prior to being
used to set the baud rate. The divider is
controlled by software and allows serial data to
be transmitted at a rate of 1, 1/16th, 1/32nd or
1I64th of the rate supplied to TxCA. In
synchronous modes, this facility is not
available, so that TxCA corresponds directly to
the transmit baud rate.
RxCA Receiver Clock.
Input used to set the receive
baud rate of the internal data receiver circuitry.
In
asynchronous modes, the receiver clock is
divided by
the same divisor programmed for the
transmitter clock. In synchronous modes,
RxCA directly sets the receive baud rate of the
data receiver circuitry.
DCDA Data Carrier Detect. Control input from the
RS232C interface via a line receiver. When
used with a modem, the active state (logic low)
indicates that the modem has data to send.
DCDA can be programmed to operate in one of
two modes. The first mode allows DCDA to act
as the enable control line to the receive section
of channel A. The second mode sets a control
bit within an internal register according to the
state of DCDA and also has the facility to
generate an interrupt request to the Interrupt
Controller, every DCDA transition.
DTRA Data Terminal Ready. Control output to the
RS232C interface via a line driver. When used
with a modem, the active state (logic low)
indicates that the SIO is ready to start handling
data. DTRA is controlled by software,
following the logic state of an associated
control bit within an internal register.
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