Allen-Bradley ClutchBrake PLC-5 Series - How to Program a Faster Response; Program a Faster Response with Special Instructions

Programming Considerations for PLC-5 Processors F–5
Publication 65566.5.1 - October 1996
Table F.E
Typical
Additional Instruction Execution T imes for V arious T ypes of
Addressing for PLC5/1 1, 20, 30, 40, 60, 80 Processors
For This Type of Address With This Type of Data Add for Each Operand
1
indexed integer
floatingpoint
timer, counter, control
1 us
2 us
2.5 us
immediate integer
floatingpoint
0.2 us
1 us
indirect 7 + 0.1(# words) us
conversion such as floattointeger 6 us
1 An operand is an instruction parameter such as source, destination, length, etc.
Here are some suggestions for programming a faster response:
• program a faster response with special instructions
• scan logic only when needed with program control instructions
• use single transfer for up to 16 bits (one word) at a time per rung
• other considerations
Program a Faster Response with Special Instructions
Rather then trying to minimize program scan time, consider
responding faster with special programming techniques such as:
• program critical inputs and outputs with Immediate Input (IIN)
and Immediate Output (IOT) instructions where the processor
interrupts the program scan to immediately monitor the subject
input or control the subject output each time it scans these
instructions in your ladder logic
• program critical logic with a Selectable Timed Interrupt (STI) file
where the processor interrupts and suspends the normal program scan
at periodic intervals to scan this subroutine. You preset the interval.
With either technique, the processor suspends the program scan while
executing each of these instructions. The resulting program scan is
longer but the processor responds more quickly where/when needed.
How to Program
a Faster Response