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Allen-Bradley ClutchBrake PLC-5 Series - Control by Redundant Processors

Allen-Bradley ClutchBrake PLC-5 Series
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1–3Overview of the Clutch/Brake Control System
Publication
65566.5.1 - October 1996
The clutch/brake control system uses two independent PLC-5/x6
processors (Figure 1.1), such as but not limited to:
PLC-5/46 processor operating in scanner mode in chassis A
PLC-5/26 processor operating in adapter mode in chassis B
Both processors monitor all clutch/brake I/O and exchange information
regarding machine status. They are linked by hardwired I/O and a
communication channel so that if one processor detects a condition
different from that detected by the other, its control logic is designed to
declare a fault and turn off all outputs to press valves. The other
processor is designed to follow suit.
Chassis A or B may contain additional optional I/O modules for other
press functions. Otherwise, I/O modules in both chassis are identical.
Figure 1.1
Typical
Architecture for Redundant Control
PLC5/46 Processor A (scanner) has these program files:
PF2 Factoryconfigured master control program (locked)
PF3 Your file for calling auxiliary presscontrol functions
PF15 Your file for customizing clutch/brake control in PF16
PF16 Factoryconfigured clutch/brake program (locked)
PLC5/26 Processor B (adapter, rack 02 of processor A)
has the same program files, but the use of PF3 is optional
Clutch/Brake I/O
to/from the press
Clutch/Brake I/O, &
other I/O to/from the
press for auxiliary
functions
Press
Control Panel
Operator
Interface
DH+ Network
Remote I/O to drives, pneumatic valves, optional
processor for additional automation, and man/
machine interface.
Line
Supervisor
For programming, networking,
troubleshooting,and
information management
Feedback
Chassis B
Chassis A
Dual processors control outputs to clutch/brake valves. To illustrate
the redundant control concept, we show how processor outputs are
linked to processor inputs (Figure 1.2) where –( )– are processor
outputs, and –] [– are processor inputs:
Figure 1.2
Redundant
Control of Processor Outputs for Ungrounded AC
Power
Processor A Processor B
V
alve Solenoid
L1 L2
Control by
Redundant Processors

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