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Allen-Bradley SLC 500 Series

Allen-Bradley SLC 500 Series
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Publication 1747-RM001G-EN-P - November 2008
Data Handling Instructions 5-21
Or (OR)
This instruction performs a bit-by-bit logical OR. The operation is performed
using the value at source A and the value at source B. The result is stored in
the destination.
Source A and B can either be a word address or a constant; however, both
sources cannot be a constant. The destination must be a word address.
Updates to Arithmetic Status Bits
The arithmetic status bits are found in Word 0, bits 0 to 3 in the controller
status file. After an instruction is executed, the arithmetic status bits in the
status file are updated.
OR
Bitwise Inclusive OR
Source A B3:2
16C8h<
Source B B3:3
EF0Ch<
Dest B3:4
FFCCh<
OR
Output Instruction
Fixed SLC
5/01
SLC
5/02
SLC
5/03
SLC
5/04
SLC
5/05
•••••
Table 5.11 Truth Table for A OR B = Dest
ABDest
000
101
011
111
Table 5.12 Controller Function
With this Bit The Controller
S:0/0 Carry (C) always resets.
S:0/1 Overflow (V) always resets.
S:0/2 Zero (Z) sets if result is zero; otherwise resets.
S:0/3 Sign (S) sets if result is negative (most significant bit is set)
otherwise resets.

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