Allen-Bradley SLC 500 Series - Page 686

Publication 1747-RM001G-EN-P - November 2008
4 Index
Slot Number B-55
subroutine content 11-20
Discrete Input Interrupt Status File
Accumulator
B-56
Bit mask B-55
Compare Value B-56
Down Coun B-56
displaying values E-18
Divide (DIV) 4-9
math instruction 4-9
Double Divide (DDV) 4-11
math instruction 4-11
DTR control bit (channel 0) B-50
DTR force bit (channel 0) B-50
duplicate packet detection
SLC 5/03, 5/04, and 5/05
13-52, 13-59,
13-67, 13-72
E
embedded responses
SLC 5/03, 5/04, and 5/05
13-52
ENC, Encode 1 of 16 to 4 5-11
Encode (ENC) 5-11
data handling instruction 5-11
updates to arithmetic status bits 5-12
Encode 1 of 16 to 4 (ENC) 5-11
entering parameters 5-12
Enhanced PLC-5 13-63
ENQ Retries
SLC 5/03, 5/04 or 5/05
13-52
entering
numeric constants
E-18
values E-19
Entering Parameters for BTR and BTW
8-2
EOT suppression 13-59, 13-67, 13-73
error codes
ASCII instructions
10-24
MSG instruction 12-41
Error detection
SLC 5/03, 5/04, and 5/05
13-52, 13-58,
13-66, 13-72, 13-80
errors
going-to-run
16-4
runtime 16-6
user program 16-9
Ethernet
communication protocol
13-2, 13-22
configuration parameters 12-29
connections 13-23
messaging 13-22
processor performance 13-22
SVC instruction 12-3
EtherNet/IP Explicit Message (EEM)
12-58
Examine if Closed (XIC) 2-3
basic instruction 2-3
Examine if Open (XIO) 2-3
basic instruction 2-3
Example
active station file
13-63
Exclusive Or (XOR)
updates to arithmetic status bits
5-22
Explicit Message Instructions overview
12-44
F
fault override at powerup bit B-7
fault routines (SLC 5/02, SLC 5/03, and SLC
5/04)
11-2
application example 11-4
faults
troubleshooting
16-1
FIFO and LIFO instructions
overview
5-25
effects on index register 5-26
FIFO Load (FFL) 5-26
FIFO instruction 5-26
FIFO Unload (FFU) 5-26
FIFO instruction 5-26
file copy and file fill instructions E-17
file indicator (#) E-15
file organization
data files
E-2
program files E-1
Fill File (FLL) 5-14
data handling instruction 5-14
using 5-14
first pass bit B-13
floating point file 4-4
floating point math flag disable bit B-51
floating point, supported 3-2
Equal (EQU) 3-2
Greater Than (GRT) 3-3
Greater Than or Equal (GEQ) 3-2
Less Than (LES) 3-3
Less Than or Equal (LEQ) 3-3
Limit (LIM) 3-5
Move (MOV) 5-16
forces enable bit B-6
forces installed bit B-7
free running clock B-21