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Allen-Bradley SLC 500 Series
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Publication 1747-RM001G-EN-P - November 2008
Index 9
T
Tangent (TAN) 4-32
math instruction 4-32
test single step
breakpoint
B-40
start step on B-40
test-fault/powerdown B-41
timer accumulator value (.ACC) 2-7
timer accuracy 2-8
timer and counter instructions 1-5
accumulator value (.ACC) 1-7, 2-7
addressing structure 1-5
counters
Count Up (CTU)
2-13, 2-14
High-Speed Counter (HSC) 2-15
Reset (RES) 2-20
how counters work 2-13
preset value (.PRE) 2-7
timebase 2-8
timer accuracy 2-8
timer file E-3
timer instructions
addressing structure
1-5
Timer Off-Delay (TOF)
using status bits
2-10
Timer On-Delay (TON)
using status bits
2-9
timer preset value (.PRE) 2-7
timer timebase 2-8
timers
timer accuracy
2-8
timing diagrams
ASCII
10-16
message instruction (SLC 5/03 and SLC
5/04)
12-37
TOD (convert from BCD) 5-2
troubleshooting faults 16-1
clearing faults
automatically
16-1
manually 16-2
going-to-run errors 16-4
processor LEDs 16-15
runtime errors 16-6
user program instruction errors 16-9
U
understanding file organization E-1
numeric constants E-18
processor file overview E-1
specifying indexed addresses E-10
using the file indicator (#) E-15
user program errors 16-9
user word comparison between SLC 5/03
and SLC 5/02
C-12
using RSLinx Classic, version 2.50 and
higher with
SLC 5/03 passthru
14-5
SLC 5/04 passthru 14-8
SLC 5/05 passthru 14-11
W
watchdog scan time byte B-20
X
X to the Power of Y (XPY) 4-33
math instruction 4-33
XIC, Examine if Closed 2-3
XIO, Examine if Open 2-3
Z
zero bit B-5

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