Debug
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 12-60
ID073015 Non-Confidential
Example 12-5 Host to target data transfer (host end)
WriteDCC(uint32 dtr_val)
{
// Step 1. Poll DBGDSCR until DTRRXfull is clear.
repeat
{
dscr := ReadDebugRegister(34);
}
until (!(dscr & (1<<30)));
// Step 2. Write the value to DBGDTRRX.
WriteDebugRegister(32, dtr_val);
}
While the processor is running, if the DCC is used as a data channel, it might be appropriate to
poll the DCC regularly.
Example 12-6 shows the code for polling the DCC.
Example 12-6 Polling the DCC (host end)
PollDCC
{
dscr := ReadDebugRegister(34);
if (dscr & (1<<29))
{
// DBGDTRTX (target -> host transfer register) full
dtr := ReadDebugRegister(35)
ProcessTargetToHostWord(dtr);
}
if (!(dscr & (1<<30)))
{
// DBGDTRRX (host -> target transfer register) empty
dtr := GetNextHostToTargetWord()
WriteDebugRegister(32, dtr);
}
}
12.11.2 Programming breakpoints and watchpoints
This section describes the following operations:
• Programming simple breakpoints and the byte address select
• Setting a simple aligned watchpoint on page 12-61
• Setting a simple unaligned watchpoint on page 12-62.
Programming simple breakpoints and the byte address select
When programming a simple breakpoint, you must set the byte address select bits in the control
register appropriately. For a breakpoint in ARM state, this is simple. For Thumb state, you must
calculate the value based on the address.
To Next Page
Loading...
