ARM Cortex-R4 - Page 346

Debug
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 12-72
ID073015 Non-Confidential
// Step 9: Check for aborts.
aborted := CheckForAborts();
// Step 10: Read the final word from the DCC.
if (!aborted) *data := ReadDCC();
// Step 11. Restore the corrupted register r0.
WriteRegister(0, saved_r0);
}
Example 12-26 shows the sequence for writing a block of words to memory.
Example 12-26 Writing a block of words to memory (fast download)
WriteWords(uint32 address, bool &aborted, uint32 *data, int nwords)
{
// Step 1. Save the value of R0.
saved_r0 := ReadRegister(0);
// Step 2. Write the value 0b10 to DBGDSCR[21:20] for fast mode.
SetDTRAccessMode(2);
// Step 3. Write the opcode for MRC p14, 0, R0, c5, c0 to the DBGITR.
// Write stalls until the DBGITR is ready but the instruction is not issued.
WriteDebugRegister(33, 0xEE100E15);
// Step 4. Write the address to read from to the DBGDTRRX
// Write stalls until the DBGITR is ready, but the instruction is not reissued.
WriteDebugRegister(32, address);
// Step 5. Write the opcode for STC p14, c5, [R0], 4 to the DBGITR.
// Write stalls until the DBGITR is ready but the instruction is not issued.
WriteDebugRegister(33, 0xECA05E01);
// Step 6. Loop writing the data.
// Each time a word is written to the DBGDTRRX, the instruction is reissued.
while (nwords > 0)
{
WriteDebugRegister(35, *data++);
--nwords;
}
// Step 7. Write the value b00 to DBGDSCR[21:20] for normal mode.
SetDTRAccessMode(0);
// Step 8. Restore the corrupted register R0.
WriteRegister(0, saved_r0);
// Step 9. Check the DBGDSCR for a sticky abort.
aborted := CheckForAborts();
}
Note
As the amount of data transferred increases, these functions reach an optimum performance of
one debug register access per data word transferred.
After writing data to memory, you must execute a data synchronization barrier instruction to
ensure that the memory window updates properly.
Accessing coprocessor registers
The sequence for accessing coprocessor registers is the same for the PC and CPSR. That is, you
must first execute an instruction to transfer the register to an ARM register, then read the value
back through the DTR.
Example 12-27 on page 12-73 shows the sequence for reading a coprocessor register.