AW00011916000 Camera Functional Description
Basler scout GigE 71
6 Camera Functional
Description
This chapter provides an overview of the camera’s functionality from a system perspective. The
overview will aid your understanding when you read the more detailed information included in the
later chapters of the user’s manual.
6.1 Overview (All Models Except scA750-60)
Each camera provides features such as a full frame shutter and electronic exposure time control.
Exposure start and exposure time can be controlled by parameters transmitted to the camera via
the Basler pylon API and the GigE interface. There are also parameters available to set the camera
for single frame acquisition or continuous frame acquisition.
Exposure start can also be controlled via an externally generated "frame start trigger" (ExFSTrig)
signal applied to the camera’s input line. The ExFSTrig signal facilitates periodic or non-periodic
acquisition start. Modes are available that allow the length of exposure time to be directly controlled
by the ExFSTrig signal or to be set for a pre-programmed period of time.
Accumulated charges are read out of the sensor when exposure ends. At readout, accumulated
charges are transported from the sensor’s light-sensitive elements (pixels) to the vertical shift
registers (see Figure 32 on page 72). The charges from the bottom line of pixels in the array are
then moved into a horizontal shift register. Next, the charges are shifted out of the horizontal
register. As the charges move out of the horizontal shift register, they are converted to voltages
proportional to the size of each charge. Each voltage is then amplified by a Variable Gain Control
(VGC) and digitized by an Analog-to-Digital converter (ADC). After each voltage has been amplified
and digitized, it passes through an FPGA and into an image buffer. All shifting is clocked according
to the camera’s internal data rate. Shifting continues in a linewise fashion until all image data has
been read out of the sensor.
The pixel data leaves the image buffer and passes back through the FPGA to an Ethernet controller
where it is assembled into data packets. The packets are then transmitted via an Ethernet network
The information in this section applies to all camera models except the
scA750-60 gm/gc. For information about scA750-60 gm/gc cameras, see
Section 6.2 on page 73.
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