BeagleBone Black System
Reference Manual
Page 42 of 108
6.1.8.3 LDO_GOOD
This signal connects to the RTC_PORZn signal, RTC power on reset. As the RTC
circuitry comes up first, this signal indicates that the LDOs, the 1.8V VRTC rail, is up
and stable. This starts the power up process.
6.1.8.4 PMIC_PGOOD
Once all the rails are up, the PMIC_PGOOD signal goes high. This releases the PORZn
signal on the processor which was holding the processor reset.
6.1.8.5 WAKEUP
The WAKEUP signal from the TPS65217C is connected to the EXT_WAKEUP signal
on the processor. This is used to wake up the processor when it is in a sleep mode. When
an event is detected by the TPS65217C, such as the power button being pressed, it
generates this signal
6.1.8.6 PMIC_INT
The PMIC_INT signal is an interrupt signal to the processor. Pressing the power button
will send an interrupt to the processor allowing it to implement a power down mode in an
orderly fashion, go into sleep mode, or cause it to wake up from a sleep mode. All of
these require SW support.
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