Technical Reference Guide
4.8.3.1 LPC47B357 GPIO Utilization
The LPC47B357 I/O Controller provides 62 general-purpose pins that can be individually
configured for specific purposes. These pins are configured through the Runtime registers (logical
device 0Ah) during the system’s configuration phase of the boot sequence by the BIOS.
Table 4-20 lists the GPIO registers for the LPC47B357. Note that not all ports are listed as this
table defines only the custom implementation of GPIO ports. Refer to SMC documentation for
standard usage of unlisted GPIO ports.
Table 4-20. LPC47B357 GPIO Register Utilization
Table 4-20.
LPC47B357 GPIO Port Utilization
GPIO
Function Direction GPIO Function Direction
10 Board rev 1 I 42 ICH2 SCI O
11 Board rev 0 I 43 -- NC
12 -- NC 44 Hood Lock [1] I
13 PME- I 45 Hood Unlock [1] I
14 WOL NC 46 ICH2 SMI- O
15 Events NC 60 PCI Slot Reset O
16 Fan sense I 61 AGP Slot Reset O
17 LED test O 62 PWR Button In I
20 Pri. IDE 80-pin Cable Detect I 63 SLP S3 I
21 Sec. IDE 80-pin Cable Detect I 64 SLP S5 I
22 -- NC 65 CPU Changed I
23 Backplane board ID 0 I 66 PWR Button Out O
24 BIOS fail for AOL I 67 PS On O
25 Backplane board ID 1 I 70 Remote Off I
26 Processor Present I 71 Backplane Detect 1 I
27 -- NC 72 Backplane Detect 2 !
30 PS LED Color Grn O 73 -- NC
31 PS LED Blink O 74 NIC PHY Disable O
32 Thermal Trip I 75 -- NC
33 2 MB Media ID I 76 -- NC
34 FWH Write Protect O 85 Pwr SEL O
35 FWH Reset O 86 S3 3.3 VDC On O
36 Diskette Motor A O -- -- --
37 Diskette Select A O -- -- --
NOTE:
[1] Not implemented on Configurable Minitower models.
Compaq Deskpro and Evo Personal Computers
Featuring Intel Celeron and Pentium III Processors
Fifth Edition - March 2002
4-41
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