vi
Contents Xtium-CLHS PX8 User's Manual
Figures
Figure 1: Automatic Firmware Update ................................................................................... 12
Figure 2: Manual Firmware Update ....................................................................................... 13
Figure 3: Create an install.ini File ......................................................................................... 16
Figure 4: Board Information via Device Manager .................................................................... 18
Figure 5: User Interface GIOs Reservation ............................................................................. 19
Figure 6: GIOs Default Input Level ....................................................................................... 19
Figure 7: Open Interface GIOs Reservation............................................................................ 20
Figure 8: PCI Diagnostic Program ......................................................................................... 27
Figure 9: PCI Diagnostic Program – PCI bus info .................................................................... 27
Figure 10: Using Windows Device Manager ............................................................................ 28
Figure 11: Board Firmware Version ....................................................................................... 29
Figure 12: CamExpert Program ............................................................................................ 32
Figure 13: Xtium-CLHS PX8 Block Diagram ............................................................................ 38
Figure 14: Xtium-CLHS Flow Diagram ................................................................................... 39
Figure 15:CLHS Camera Interface ........................................................................................ 40
Figure 16: Encoder Input with Pulse-drop Counter .................................................................. 42
Figure 17: Using Shaft Encoder Direction Parameter ............................................................... 42
Figure 18: Synchronization Signals for a 10 Line Virtual Frame ................................................ 44
Figure 19: EMI Certifications ................................................................................................ 61
Figure 20: Board Layout...................................................................................................... 62
Figure 21: End Bracket Details ............................................................................................. 63
Figure 22: Data Forwarding Block Diagram ............................................................................ 64
Figure 23: General Inputs Electrical Diagram ......................................................................... 68
Figure 24: External Trigger Input Validation & Delay............................................................... 69
Figure 25:External Signals Connection Diagram ..................................................................... 70
Figure 26: General Outputs Electrical Diagram ....................................................................... 71
Figure 27:Output Signals Connection Diagram ....................................................................... 72
Figure 28: RS-422 Shaft Encoder Input Electrical Diagram ...................................................... 73
Figure 29:External RS-422 Signals Connection Diagram .......................................................... 74
Figure 30: Connecting TTL to RS-422 Shaft Encoder Inputs ..................................................... 75
Figure 31: Generating a DC Bias Voltage ............................................................................... 75
Figure 32: DH60-27P Cable No. OR-YXCC-27BE2M1 Detail ...................................................... 79
Figure 33: Photo of cable OR-YXCC-27BE2M1 ........................................................................ 79
Figure 34: I/O Cable #OR-YXCC-TIOF120 ............................................................................. 81
Figure 35: Photo of cable OR-YXCC-BSYNC40 ........................................................................ 82
Figure 36: Photo of cable assembly OR-YXCC-PWRY00 ............................................................ 83