Intel Intel® Core i7 - Page 49

Dev Kit Manual 49 323094
Reference
Designator
Function
Default Setting
Optional Setting
J5F1
TPM SETTING
OUT: Save ME RTC
Register
IN: Clear ME RTC Register
J9E1
TPM FUNCTION
OUT: Disabled
IN: Enable
J9G4
NO REBOOT
OUT: Disabled
IN: Enabled
J6B1
PCH_JTAG_RST#
IN: Logic Low
OUT: Logic High
J6E1
MPC SWITCH CONTROL
OUT: MPC Off
IN: MPC On
J9E6
BBS STRAP
OUT: Logic High
IN: Logic Low
J8F3
CONFIGURABLE CPU OUTPUT
BUFFER
OUT: Logic High
IN: Logic Low
J8F7
motherboard/SV DETECT
OUT: Logic Low
IN: Logic High
J8G1
BIOS RECOVERY
OUT: Logic High
IN: Logic Low
J2A1
HDMI LEVEL SHIFTER ENABLED
IN: Logic Low
OUT: Logic High
J7B2
PCIE SLOT 3 POWER CONTROL
2-3: V3.3S
1-2: V3.3_VAUX
J7D1
PCIE SLOT 4 POWER CONTROL
2-3: V3.3S
1-2: V3.3_VAUX
J9H5
SATA DEVICE STATUS
IN: Logic Low
OUT: Logic High
J9G3
PLL ON DIE VOLTAGE REGULATOR
ENABLE
OUT: Enabled;
Logic High
IN: Disabled; Logic Low
J7H1
SATA HOT PLUG REMOVAL DEFAULT
SUPPORTED
IN: Supported
OUT: Not Supported
J9H3
SATA DEVICE STATUS
IN: Logic Low
OUT: Logic High
J8D1
SPI PROGRAMMING
OUT: Normal
Operations
1-2: Programming SPI0 or
SPI1
J8D3
SPI PROGRAMMING
ALL OUT: Normal
Operations
1-2/3-X: Programming
SPI0
1-X/2-3: Programming
SPI1
J8D2
SPI PROGRAMMING
OUT: Normal
Operations
1-2: Programming SPI0 or
SPI1
J9E2
SPI PROGRAMMING
1-2: DEFAULT
2-3: Connected to
SPI_CS2#
J6F2
BCLK FREQUENCY SELECTION
IN: Logic High
OUT: Logic Low
J6F3
BCLK FREQUENCY SELECTION
IN: Logic Low
OUT: Logic High
J6G1
BCLK FREQUENCY SELECTION
IN: Logic Low
OUT: Logic High
J8C3
SIO RESET
1-2: Default
2-3: Logic Low - Reset
J7B1
RS232 PORT FOR EC FIRMWARE
DEBUG
OUT: Default
1-2: R2IN Logic Low
2-3: T2OUT Logic Low
J6A3
IN CKT H8 PROGRAMMING
1-2: Normal
2-3: Remote Programming
J6A2
IN CKT H8 PROGRAMMING
1-2: Normal
2-3: Remote Programming