Lime Microsystems LMS7002MR3 - Page 40

36
Address (15 bits)
Bits
Description
0x0102
15
14 – 10
9 – 5
4 – 0
GCAS_GNDREF_TXPAD_TRF_(1, 2): Controls if the TXPAD cascode transistor
gate bias is referred to VDD or GND.
0 – VDD referred (default)
1 – GNDS referred
ICT_LIN_TXPAD_TRF_(1, 2)[4:0]: Control the bias current of the linearization
section of the TXPAD. Default: 12
I_bias=I_bias_nominal * ICT/12
ICT_MAIN_TXPAD_TRF_(1, 2)[4:0]: Control the bias current of the main gm section
of the TXPAD. Default: 12
I_bias=I_bias_nominal * ICT/12
VGCAS_TXPAD_TRF_(1, 2)[4:0]: Controls the bias voltage at the gate of TXPAD
cascade. Default: 0
vgcas=(VGCAS_TXOAD/12)*100u*10K, when GCAS_GNDREF=1
vgcas=VDD18-(VGCAS_TXOAD/12)*100u*7.5K, when
GCAS_GNDREF=0
Default: 00110001 10000000
0x0103
15 –12
11
10
9 – 5
4 – 0
Reserved
SEL_BAND1_TRF_(1, 2): Enable signal for TXFE, band 1
0 – Disabled
1 – Enabled (default)
SEL_BAND2_TRF_(1, 2): Enable signal for TXFE, band 2
0 – Disabled (default)
1 – Enabled
LOBIASN_TXM_TRF_(1, 2)[4:0]: Controls the bias at the gate of the mixer NMOS
switch. Default: 16
Vgate_bias=Vth_nmos+25K*LOBIASN/12*20u
LOBIASP_TXX_TRF_(1, 2)[4:0]: Controls the bias at the gate of the mixer PMOS
switch. Default: 18
Vgate_bias=Vth_pmos-25K*LOBIASP/12*20u
Default: 00001010 00010010
0x0104
15 – 8
7 – 4
3 – 0
Reserved
CDC_I_TRF_(1,2)[3:0]: Trims the duty cycle in I channel. Default = 8;
CDC_Q_TRF_(1,2)[3:0]: Trims the duty cycle in Q channel. Default = 8;
Default: 00000000 10001000