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Lime Microsystems LMS7002MR3 - Rxtsp(A;B) Configuration Memory

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23
2.5 RxTSP(A/B) Configuration Memory
The block diagrams of the RxTSPA and RxTSPB modules are exactly the same. The control
structure is shown in Figure 23. The tables in this chapter describe the control registers of
RxTSPA and RxTSPB modules.
There is one BIST logic per RxTSPA and RxTSPB. The BIST control structure is
shown in Figure 26.
Table 5 RxTSP configuration memory
Address (15 bits)
Bits
Description
0x0400
15
14 13
12
11 10
9
8 7
6
5
4
3
2
1
0
CAPTURE: Captures value, selected by CAPSEL[1:0].
0 (default)
0-to-1 positive edge captures value, selected by CAPSEL[1:0]
CAPSEL[1:0]: Selects what parameters to capture to memory (addresses 0x0400E
and 0x0400F)
00 RSSI (default)
01 ADCI and ADCQ (see CAPSEL_ADC register for more information)
10 BSIGI and BSTATE
11 BSIGQ and BSTATE
CAPSEL_ADC: Selects ADC value source to be captured, when CAPSEL[1:0] = 01.
0 RxTSP input (default)
1 RxTSP output
Reserved
TSGFC: TSG full scale control.
0 -6dB (default)
1 Full scale
TSGFCW[1:0]: Set frequency of TSG's NCO.
DC TSG NCO frequency
========================
00 do not use
01 TSP clk/8 (default)
10 TSP clk/4
11 do not use
TSGDCLDQ: Load TSG DC Q register with value from DC_REG[15:0].
0 No action (default)
0-to-1 positive edge loads TSG's DC register Q.
TSGDCLDI: Load TSG DC I register with value from DC_REG[15:0].
0 No action (default)
0-to-1 positive edge loads TSG's DC register I.
TSGSWAPIQ: Swap signals at test signal generator's output.
0 Do not swap (default)
1 Swap I an Q signal sources comming from TSG
TSGMODE: Test signal generator mode.
0 NCO (default)
1 DC source
INSEL: Input source of TxTSP:
0 LML output (default)
1 Test signal generator
BSTART: Starts delta sigma built in self test. Keep it at 1 one at least three clock
cycles.
0 (default)
0-to-1 positive edge activates BIST
EN: RxTSP modules enable.
0 Disabled
1 Enabled (default)
Default: 00000000 10000001
0x0401
15 11
10 0
Reserved
GCORRQ[10:0]: Gain corrector value, channel Q. Unsigned integer.
Possible values are 0 2047, default is 2047
Default: 00000111 11111111
0x0402
15 11
10 0
Reserved
GCORRI[10:0]:Gain corrector value, channel I Unsigned integer.
Possible values are 0 to 2047, default is 2047
Default: 00000111 11111111

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