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Lime Microsystems LMS7002MR3 - General Control, Limelight TM and IO Cell Configuration Memory

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8
2.2 General Control, LimeLight
TM
and IO Cell Configuration
Memory
The block diagram of each IO cell is shown in Figure 21. It is possible to control the drive
strength and pull-up resistor value of each IO cell.
The tables in this chapter describe the control registers of the IO cells and
LimeLightTM Ports 1 and 2. The control diagram of the LimeLightTM ports is shown in
Figure 27.
The general purpose control registers are also described in this chapter.

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