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Lime Microsystems LMS7002MR3 - Page 83

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79
LPF High
LPF Low
Mux
PGA
LPF bypass
LPF L
LPF H
loop pdet
loop TX
Out
PGA
LPF bypass
LPF L
LPF H
loop pdet
loop TX
Out
PGA
Decoder
From: pdeto(p/n)_2 (ADC, TX RF)
From: txloop_1(p/n)_2 (TX BB loop)
From: rfeoi(p/n)_2 (RX RF)
To: rbbi(p/n)_pad_2 (PAD)
From: adcin_i(p/n)_2 (PAD)
To: rbboi(p/n)_2 (ADC)
LPF High
LPF Low
Mux
PGA
LPF bypass
LPF L
LPF H
loop pdet
loop TX
Out
PGA
LPF bypass
LPF L
LPF H
loop pdet
loop TX
Out
PGA
Decoder
From: pdeto(p/n)_2 (ADC, TX RF)
From: txloop_2(p/n)_2 (TX BB loop)
From: rfeoq(p/n)_2 (RX RF)
To: rbbq(p/n)_pad_2 (PAD)
From: adcin_q(p/n)_2 (PAD)
To: rbboq(p/n)_2 (ADC)
EN_LB_LPFH_RBB_2 (0x0115[15])
EN_LB_LPFL_RBB_2 (0x0115[14])
EN_LB_LPFH_RBB_2 (0x0115[15])
PD_LPFH_RBB_2 (0x0115[3])
R_CTL_LPF_RBB_2 (0x0116[15:11])
RCC_CTL_LPFH_RBB_2 (0x0116[10:8])
C_CTL_LPFH_RBB_2 (0x0116[7:0])
INPUT_CTL_PGA_RBB_2 (0x0118[15:13])
G_PGA_RBB_2 (0x0119[4:0])
PD_PGA_RBB_2 (0x0115[1])
OSW_PGA_RBB_2 (0x0119[15])
RCC_CTL_PGA_RBB_2 (0x011A[13:9])
C_CTL_PGA_RBB_2 (0x011A[7:0])
PD_PGA_RBB_2 (0x0115[1])
OSW_PGA_RBB_2 (0x0119[15])
RCC_CTL_PGA_RBB_2 (0x011A[13:9])
C_CTL_PGA_RBB_2 (0x011A[7:0])
OSW_PGA_RBB_2 (0x0119[15])
EN_LB_LPFL_RBB_2 (0x0115[14])
PD_LPFL_RBB_2 (0x0115[2])
R_CTL_LPF_RBB_2 (0x0116[15:11])
RCC_CTL_LPFL_RBB_2 (0x0117[13:11])
C_CTL_LPFL_RBB_2 (0x0117[10:0])
PD_PGA_RBB_2 (0x0115[1])
OSW_PGA_RBB_2 (0x0119[15])
RCC_CTL_PGA_RBB_2 (0x011A[13:9])
C_CTL_PGA_RBB_2 (0x011A[7:0])
PD_PGA_RBB_2 (0x0115[1])
OSW_PGA_RBB_2 (0x0119[15])
RCC_CTL_PGA_RBB_2 (0x011A[13:9])
C_CTL_PGA_RBB_2 (0x011A[7:0])
EN_LB_LPFL_RBB_2 (0x0115[14])
PD_LPFL_RBB_2 (0x0115[2])
R_CTL_LPF_RBB_2 (0x0116[15:11])
RCC_CTL_LPFL_RBB_2 (0x0117[13:11])
C_CTL_LPFL_RBB_2 (0x0117[10:0])
INPUT_CTL_PGA_RBB_2 (0x0118[15:13])
G_PGA_RBB_2 (0x0119[4:0])
EN_LB_LPFH_RBB_2 (0x0115[15])
EN_LB_LPFL_RBB_2 (0x0115[14])
EN_LB_LPFH_RBB_2 (0x0115[15])
PD_LPFH_RBB_2 (0x0115[3])
R_CTL_LPF_RBB_2 (0x0116[15:11])
RCC_CTL_LPFH_RBB_2 (0x0116[10:8])
C_CTL_LPFH_RBB_2 (0x0116[7:0])
OSW_PGA_RBB_2 (0x0119[15])
Bias
blocks
Buffers
for SPI
signals
PD_LPFH_RBB_2 (0x0115[3])
PD_LPFL_RBB_2 (0x0115[2])
PD_PGA_RBB_2 (0x0115[1])
ICT_LPF_IN_RBB_2 (0x0118[9:5])
ICT_LPF_OUT_RBB_2 (0x0118[4:0])
ICT_PGA_OUT_RBB_2 (0x0119[14:10])
ICT_PGA_IN_RBB_2 (0x0119[9:5])
Channel I
Channel Q
Analog signal lines
Signal input/output
RESET_N (XXXX)
IO control name (register adress)
Control signal lines
Band block
LMS7002M
RBB_TOP 2
Figure 8 RBB2 control structure

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