Lime Microsystems LMS7002MR3 - Page 91

87
Forward divider
2^N
VCO
feedback
divider
Fractional
PFD
CP
LPF
Reset
signal
SYNC
SDM
ΣΔ
Vtune
Comparator
LPF test
muxer
Test signal
muxers
To SPI: COARSEPLL_COMPO_SXR (0x0123[14])
To SPI: COARSE_STEPDONE_SXR (0x0123[15])
To: tstdo<1:0> (PAD)
To: tstao (PAD)
To SPI: VCO_CMPHO_SXR (0x0123[13])
To SPI: VCO_CMPLO_SXR (0x0123[12])
To SPI: SDM_TSTO_SXR<13:0>
PD_CP_SXR (0x011C[5])
REVPH_PFD (0x0122[12])
IOFFSET_CP_SXR<5:0> (0x0122[11:6])
IPULSE_CP_SXR<5:0> (0x0122[5:0])
CP3_PLL_SXR<3:0> (0x0123[7:4])
EN_COARSEPLL_SXR (0x011C[12])
CPZ_PLL_SXR<3:0> (0x0123[3:0])
CP2_PLL_SXR<3:0> (0x0123[11:8])
From: XCLK_RX (XBUF RX)
RESET_N_SXR (0x011C[15])
EN_INTONLY_SDM_SXR (0x011C[9])
EN_SDM_TSTO_SXR (0x00A8[5])
SX_DITHER_EN_SXR (0x011F[1])
FRAC_SDM_SXR<19:0> (0x011D[15:0])+(0x011E[3:0])
INT
_
SDM
_
SXR<9
:
0
>
(
0
x
011
E
[
13
:
4
])
REV_SDMCLK_SXR (0x011F[0])
SEL_SDMCLK_SXR (0x011F[2])
EN_SDM_CLK_SXR (0x011C[8])
PD_SDM_SXR (0x011C[3])
PD_VCO _SXR (0x011C[1])
SEL_VCO_SXR<1:0> (0x0121[2:1])
SPDUP_VCO_SXR (0x011C[14])
BYPLDO_VCO_SXR (0x011C[13])
CURLIM_VCO_SXR (0x011C[11])
RSEL_LDO_VCO_SXR<4:0> (0x0121[15:11])
VDIV_VCO_SXR<7:0> (0x0120[15:8])
ICT_VCO_SXR<7:0> (0x0120[7:0])
CSW_VCO_SXR<7:0> (0x0121[10:3])
PD_FBDIV_SXR (0x011C[7])
COARSE_START_SXR (0x0121[0])
EN_DIV2_DIVPROG_SXR (0x011C[10])
DIV_LOCH_SXR<2:0> (0x011F[8:6])
PW_DIV2_LOCH_SXR<2:0> (0x011F[14:12])
PW_DIV4_LOCH_SXR<2:0> (0x011F[11:9])
PD_VCO_COMP_SXR (0x011C[2])
TST_SX_SXR<2:0> (0x011F[5:3])
Bias
blocks
Buffers
for SPI
signals
LMS7002M
SX_TOP RX
Analog signal lines
Signal input/output
RESET_N (XXXX)
IO control name (register adress)
EN_COARSEPLL_SXR (0x011C[12])
PD_VCO _SXR (0x011C[1])
PD_VCO _SXR (0x011C[1])
PD_CP_SXR (0x011C[5])
TST_SX_SXR<2:0> (0x011F[5:3])
TST_SX_SXR<2:0> (0x011F[5:3])
PD_FDIV_SXR (0x011C[4])
Control signal lines
TST_SX_SXR<2> (0x011F[5])
Mux+buffer
Buffer Buffer
From: LOCH_OP_T (SXT)
From: LOCH_ON_T
(SXT)
To: LOCH_IRP (RX RF)
To: LOCH_IRN (RX RF)
To: LOCH_ITP (TX RF)
To: LOCH_ITN (TX RF)
PD_LOCH_T2RBUF (0x011C[6])
RZ_CTRL_SXR<1:0> (0x0122[15:14])
CMPLO_CTRL_SXR (0x0122[13])
Figure 16 SXR control structure