Matrox Solios Series - Page 80

80 Chapter 4: Matrox Solios hardware reference
Data
valid
input
01 0
11 0
21 0
31 0
Timer-
clock
input
01 0
11 0
21 0
31 0
User-
defined
Input
0 100 1 23456789
1 10 0 1 45236789
2 10 0 1 45672389
3 10 0 1 45678923
User-
defined
output
03 2 01
13 2 01
23 2 01
33 2 01
1. The maximum # for each signal type cannot always be attained. The actual maximum depends on whether the required auxiliary signals are available or have been
defined as another type.
2. On analog video input connectors (DVI).
3. On external auxiliary I/O connector 1 (DB-9)
4. On external auxiliary I/O connector 0 (DB-44).
Type of
signal
Path# Max # signals
1
TTL aux. input
2
TTL aux. output
2
Opto aux.
input
3
TTL/LVDS aux. input
4
TTL/LVDS aux. output
4
P0_TTL_AUX(TRIG)_IN P1_TTL_AUX(TRIG)_IN P2_TTL_AUX(TRIG)_IN P3_TTL_AUX(TRIG)_IN P0_TTL_AUX(EXP)_OUT P1_TTL_AUX(EXP)_OUT P2_TTL_AUX(EXP)_OUT P3_TTL_AUX(EXP)_OUT P0_OPTO_AUX(TRIG)_IN P1_OPTO_AUX(TRIG)_IN P2_OPTO_AUX(TRIG)_IN P3_OPTO_AUX(TRIG)_IN LVDS/T TL _AUX_IN 0 LVDS/T TL _AUX_IN 1 LVDS/T TL _AUX_IN 2 LVDS/T TL _AUX_IN 3 LVDS/T TL _AUX_IN 4 LVDS/T TL _AUX_IN 5 LVDS/T TL _AUX_IN 6 LVDS/T TL _AUX_IN 7 P0_LVDS/TTL_AUX_OUT0 P0_LVDS/TTL_AUX_OUT1 P1_LVDS/TTL_AUX_OUT0 P1_LVDS/TTL_AUX_OUT1 P2_LVDS/TTL_AUX_OUT0 P2_LVDS/TTL_AUX_OUT1 P3_LVDS/TTL_AUX_OUT0 P3_LVDS/TTL_AUX_OUT1