EasyManua.ls Logo

Mitsubishi Electric WS0-CPU0 - Page 124

Mitsubishi Electric WS0-CPU0
322 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Chapter 9
121
Logic programming – Function blocks
Take delays into account that are caused by CPU markers and jump addresses
with logic loop backs!
A loop back signal is an input signal that is connected to an output of a function block
with the same or higher function block index (the function block index is displayed at
the top of each function block). Therefore the input uses the output value of the
previous logic cycle. This must be considered for the functionality and especially for
the response time calculation.
To connect a loop back signal a jump address or a CPU marker must be used. A CPU
marker generally causes a delay of one logic cycle.
A jump address causes a delay of one logic cycle if it constitutes a loop back. If this is
the case, the input of the jump address is displayed with a clock symbol (with Setting
and Monitoring Tool V1.3.0 or higher).
Figure 91:
CPU marker
Figure 92:
Jump address with loop
back

Table of Contents

Related product manuals