Mitsubishi Electric WS0-CPU0 - Page 14

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7.4.4 Flexi Link stations: Flexi Link data in the logic editor ............................... 98
7.4.5 Flexi Link stations: Station X view and process image ........................... 100
7.4.6 Flexi Link stations: Teach function .......................................................... 102
7.4.7 Flexi Link teaching status and diagnostics ............................................. 104
7.5 Flexi Link troubleshooting ............................................................................. 106
7.5.1 Flexi Link ID mismatch ........................................................................... 106
8. Flexi Line ............................................................................................................ 107
8.1 Flexi Line overview ....................................................................................... 107
8.1.1 System requirements and restrictions for Flexi Line .............................. 107
8.2 Principle of operation Flexi Line .................................................................... 108
8.2.1 Topology ................................................................................................. 108
8.2.2 Flexi Line configuration ........................................................................... 108
8.2.3 Flexi Line checksum (CRC) ..................................................................... 111
8.2.4 Flexi Line data in the logic editor ............................................................. 112
8.2.5 Teach function.......................................................................................... 113
8.2.6 Status and diagnostics ............................................................................. 115
8.3 Getting started ................................................................................................ 116
8.3.1 Configuration and commissioning of a Flexi Line system ....................... 116
8.3.2 Conversion of a Flexi Line system .......................................................... 117
8.3.3 Configuration of the Flexi Line logic ........................................................ 118
9. Logic programming
– Function blocks ............................................................... 120
9.1 General description ....................................................................................... 120
9.2 Safety notes for the logic programming ........................................................ 120
9.3 Function block Overview ............................................................................... 122
9.4 Function block properties .............................................................................. 123
9.5 Input and output signal connections of function blocks ................................ 124
9.5.1 Function block input connections ........................................................... 124
9.5.2 Inversion of input connections ................................................................ 124
9.5.3 Function block output connections ......................................................... 125
9.5.4 Fault present output ................................................................................ 126
9.6 Timer values and logic execution time .......................................................... 127
9.7 Logic function blocks ..................................................................................... 127
9.7.1 NOT ........................................................................................................ 127
9.7.2 AND ........................................................................................................ 128
9.7.3 OR .......................................................................................................... 129
9.7.4 XOR (exclusive OR) ............................................................................... 130
9.7.5 XNOR (exclusive NOR) .......................................................................... 131
9.7.6 Multiple release ...................................................................................... 131
9.7.7 RS Flip-Flop ............................................................................................ 132
9.7.8 JK Flip-Flop ............................................................................................ 133
9.7.9 Multiple memory ..................................................................................... 134