Mitsubishi Electric WS0-CPU0 - Page 184

Chapter 9
181
Logic programming – Function blocks
 the Frequency 1 error output is high or
 the Frequency 2 error output is high or
 the Frequency 1 constant high output is high or
 the Frequency 2 constant high output is high.
The Frequency x error, Frequency x constant high and Fault present outputs
change to low again if the Enable x output changes to high, i.e. two periods with a
valid period duration and a valid pulse duration have been detected on the
Frequency x input.
After the transition from the Stop state to the Run state all outputs are low.
Sequence/timing diagrams
Figure 167:
Sequence/timing diagram
for the frequency monitor
function block, period
duration too long
Figure 168:
Sequence/timing diagram
for the frequency monitor
function block, period
duration too short
Figure 169:
Sequence/timing diagram
for the frequency monitor
function block, frequencyx
constant high