CONNECTION DIAGRAMS
“Confidential, Do Not Duplicate without written authorization from NEC.”
12-2
CPU PWB (PWC-4651) 1/2
POIF Connect to PLKEY PWB
1
2
3 I2C CLK
4 I2C Data
5
6
7
8
9
10
11 KEY matrix (KEYIN1)
12 KEY matrix (KEYIN0)
13 KEY matrix (KEYIN3)
14 KEY matrix (KEYIN2)
15 KEY matrix (KEYOUT0)
16 NC
17 KEY matrix (KEYOUT2)
18 KEY matrix (KEYOUT1)
19 KEY matrix (KEYOUT4)
20 KEY matrix (KEYOUT3)
21 Status LED (Red) CTL (L : Light)
22 Status LED (Green) CTL (L : Light)
23 Power LED (Red) CTL (L : Light)
24 Power LED (Green) CTL (L : Light)
25
26
27
28
29 LCD CTL (B6)
30 LCD CTL (B7)
31 LCD CTL (B4)
32 LCD CTL (B5)
33 LCD CTL (E)
34 Detect Backlight SW (L: ON H: OFF)
35 LCD CTL (RS)
36 LCD CTL (RXW)
37
38
39 Reset (3.3V constant)
40 IR (3.3V pulse)
GND
5V Standby
3.3V Standby
GND
GND
GND
5V Standby
Connector pin array
POCF Connect to PJDIV PWB
1I2C CLK
2 I2C Data
3 GND
4 3wire CLK
5 3wire Data
6 3wire CS1
7 3wire CS2
8 3wire CS3
9 GND
10 GND
POCE Connect to PJDIV PWB
1 Lamp stop (L : OK H : NG)
2 Power BIT in (L: Main PS ON H: Main PS OFF)
3 GND
4NC
5 FD1 for Pump (Pulse: OK Non pulse: NG)
6NC
7 FD2 for Pump (Pulse: OK Non pulse : NG)
8 Pump CTL (L: Pump ON H: Pump OFF)
9 FD3 for Pump (Pulse: OK Non pulse: NG)
10 GND
11 Rear status LED (Red) CTL (L: ON H: OFF)
12 Rear status LED (Green) CTL (L: ON H: OFF)
13 Power good status (L: OK H: Fail)
14 Power good CTL (L: OK H: Fail)
15 Interlock status (L: Interlock OK H: Interlock NG)
POCP Connect to PJDIV PWB
1
2
3 GND
4NC
5 GND
6 5V Main
7 GND
5V Standby