– 345 – NWA-008841-001 Rev.5.0
90ch3003.fm
NOTE 3: The system can receive clock signals from two clock supply routes.
In normal condition, the system synchronizes to the clock signals supplied on the PLO0 of MP
card via the Back Wiring Board, and if the clock signals are failed, the clock supply route takes
over to PLO1 automatically. Set SW11-2 and SW11-3 as follows.
NOTE 4: Mount the BRT card which receives a source clock signals into PIM0.
CONDITIONS
BRT0 BRT1 BRT2 ---- BRT23
REMARKS
SW
11-2
SW
11-3
SW
11-2
SW
11-3
SW
11-2
SW
11-3
----
SW
11-2
SW
11-3
When one BRT
is provided.
ON ON
MP card will receive the
clock signal from No.0 circuit
of BRT0 at its PLO0 input.
Should a clock failure occur
with No.0 circuit, MP card
will switch to No. 1 circuit of
BRT0.
When more
than one BRT is
provided.
ON ON ON OFF OFF ON ---- OFF ON
MP card will receive the
clock signal from BRT0 at its
PLO0 input, under normal
conditions.
Should a clock failure occur
with both No.0 and No.1 cir-
cuits of BRT0, MP card will
switch to the PLO1 input
which gets clock from BRT1.
PN-2BRTC (BRT)
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