NXP Semiconductors i.MX8 QM - Page 11

Table 9. Capacitor recommendations to be placed near i.MX8 QM
2
Checkbox Supply 1 µF
2.2
µF
22 µF 100 µF Notes
VDD_DDR_CH0_VDDQ
VDD_DDR_CH0_VDDQ_CKE
6 2 ---
2.2 µF caps should be placed under
the BGA package.
VDD_DDR_CH0_VDDA_PLL_1P8 2
This rail should be sourced from the
main 1.8 V rail through a 120 Ω
ferrite bead.
VDD_DDR_CH1_VDDQ
VDD_DDR_CH1_VDDQ_CKE
6 2 ---
2.2 µF caps should be placed under
the BGA package.
VDD_DDR_CH1_VDDA_PLL_1P8 2
This rail should be sourced from the
main 1.8 V rail through a 120 Ω
ferrite bead.
VDD_A53 5 --- 2
2.2 µF caps should be placed under
the BGA package.
VDD_A72 5 --- 3
2.2 µF caps should be placed under
the BGA package.
VDD_GPU0 6 --- 3
2.2 µF caps should be placed under
the BGA package.
VDD_GPU1 6 --- 3
2.2 µF caps should be placed under
the BGA package.
VDD_MEMC 6 --- 3
2.2 µF caps should be placed under
the BGA package.
VDD_MAIN 13 --- 2
2.2 µF caps should be placed under
the BGA package.
VDD_LVDS0_1P0 VDD_LVDS1_1P0
VDD_MIPI_CSI0_1P0
VDD_MIPI_CSI1_1P0
VDD_MIPI_DSI0_1P0
VDD_MIPI_DSI1_1P0
VDD_MIPI_DSI0_PLL_1P0
VDD_MIPI_DSI1_PLL_1P0
5 1 --- These 8 balls are tied to the
VDD_MAIN supply and filtered as
shown (see the development platform
schematic and section 7.11).
VDD_SCU_XTAL _1P8 --- --- --- --- Place a 0.22 µF cap under the
BGA package.
VDD_ANAn_1P8 VDD_SCU_1P8_n
VDD_SCU_ANA_1P8
VDD_CP_1P8
6 --- --- 2.2 µF caps should be placed under
the BGA package.
Table continues on the next page...
NXP Semiconductors
i.MX8 QM and QXP design checklist
i.MX8 QM / i.MX8 QXP Hardware Developer’s Guide, Rev. 2.4p, 06/2021
User's Guide 11 / 89